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[ARM] Disable lmw when fastmem is disabled.

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This commit is contained in:
Ryan Houdek 2013-09-12 02:40:53 -05:00
parent d9dd0a7874
commit fa5499e046
2 changed files with 10 additions and 1 deletions
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9
Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
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@ -134,6 +134,9 @@ void JitArm::SafeStoreFromReg(bool fastmem, s32 dest, u32 value, s32 regOffset,
void JitArm::stX(UGeckoInstruction inst) void JitArm::stX(UGeckoInstruction inst)
{ {
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
u32 a = inst.RA, b = inst.RB, s = inst.RS; u32 a = inst.RA, b = inst.RB, s = inst.RS;
s32 offset = inst.SIMM_16; s32 offset = inst.SIMM_16;
u32 accessSize = 0; u32 accessSize = 0;
@ -455,6 +458,12 @@ void JitArm::lXX(UGeckoInstruction inst)
// We make the assumption that this pulls from main RAM at /all/ times // We make the assumption that this pulls from main RAM at /all/ times
void JitArm::lmw(UGeckoInstruction inst) void JitArm::lmw(UGeckoInstruction inst)
{ {
INSTRUCTION_START
JITDISABLE(bJITLoadStoreOff)
if (!Core::g_CoreStartupParameter.bFastmem){
Default(inst); return;
}
u32 a = inst.RA; u32 a = inst.RA;
ARMReg rA = gpr.GetReg(); ARMReg rA = gpr.GetReg();
ARMReg rB = gpr.GetReg(); ARMReg rB = gpr.GetReg();

2
Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp
View File

@ -71,7 +71,6 @@ void JitArm::mfspr(UGeckoInstruction inst)
JITDISABLE(bJITSystemRegistersOff) JITDISABLE(bJITSystemRegistersOff)
u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F);
ARMReg RD = gpr.R(inst.RD);
switch (iIndex) switch (iIndex)
{ {
case SPR_WPAR: case SPR_WPAR:
@ -81,6 +80,7 @@ void JitArm::mfspr(UGeckoInstruction inst)
Default(inst); Default(inst);
return; return;
default: default:
ARMReg RD = gpr.R(inst.RD);
LDR(RD, R9, PPCSTATE_OFF(spr) + iIndex * 4); LDR(RD, R9, PPCSTATE_OFF(spr) + iIndex * 4);
break; break;
} }