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This is used when fastmem isn't available. Instead of always falling back to the C++ code in MMU.cpp, the JIT translates addresses on its own by looking them up in a table that Dolphin constructs. This is slower than fastmem, but faster than the old non-fastmem code. This is primarily useful for iOS, since that's the only major platform nowadays where you can't reliably get fastmem. I think it would make sense to merge this feature to master despite this, since there's nothing actually iOS-specific about the feature. It would be of use for me when I have to disable fastmem to stop Android Studio from constantly breaking on segfaults, for instance. Co-authored-by: OatmealDome <julian@oatmealdome.me>
225 lines
8.3 KiB
C++
225 lines
8.3 KiB
C++
// Copyright 2018 Dolphin Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <array>
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#include <cstddef>
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#include <optional>
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#include <string>
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#include "Common/CommonTypes.h"
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namespace PowerPC
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{
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// Routines for debugger UI, cheats, etc. to access emulated memory from the
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// perspective of the CPU. Not for use by core emulation routines.
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// Use "Host" prefix.
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enum class RequestedAddressSpace
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{
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Effective, // whatever the current MMU state is
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Physical, // as if the MMU was turned off
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Virtual, // specifically want MMU turned on, fails if off
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};
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// Reads a value from emulated memory using the currently active MMU settings.
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// If the read fails (eg. address does not correspond to a mapped address in the current address
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// space), a PanicAlert will be shown to the user and zero (or an empty string for the string case)
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// will be returned.
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u8 HostRead_U8(u32 address);
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u16 HostRead_U16(u32 address);
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u32 HostRead_U32(u32 address);
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u64 HostRead_U64(u32 address);
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float HostRead_F32(u32 address);
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double HostRead_F64(u32 address);
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u32 HostRead_Instruction(u32 address);
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std::string HostGetString(u32 address, size_t size = 0);
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template <typename T>
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struct ReadResult
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{
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// whether the address had to be translated (given address was treated as virtual) or not (given
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// address was treated as physical)
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bool translated;
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// the actual value that was read
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T value;
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ReadResult(bool translated_, T&& value_) : translated(translated_), value(std::forward<T>(value_))
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{
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}
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ReadResult(bool translated_, const T& value_) : translated(translated_), value(value_) {}
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};
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// Try to read a value from emulated memory at the given address in the given memory space.
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// If the read succeeds, the returned value will be present and the ReadResult contains the read
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// value and information on whether the given address had to be translated or not. Unlike the
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// HostRead functions, this does not raise a user-visible alert on failure.
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std::optional<ReadResult<u8>>
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HostTryReadU8(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<ReadResult<u16>>
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HostTryReadU16(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<ReadResult<u32>>
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HostTryReadU32(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<ReadResult<u64>>
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HostTryReadU64(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<ReadResult<float>>
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HostTryReadF32(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<ReadResult<double>>
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HostTryReadF64(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<ReadResult<u32>>
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HostTryReadInstruction(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<ReadResult<std::string>>
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HostTryReadString(u32 address, size_t size = 0,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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// Writes a value to emulated memory using the currently active MMU settings.
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// If the write fails (eg. address does not correspond to a mapped address in the current address
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// space), a PanicAlert will be shown to the user.
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void HostWrite_U8(u32 var, u32 address);
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void HostWrite_U16(u32 var, u32 address);
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void HostWrite_U32(u32 var, u32 address);
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void HostWrite_U64(u64 var, u32 address);
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void HostWrite_F32(float var, u32 address);
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void HostWrite_F64(double var, u32 address);
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struct WriteResult
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{
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// whether the address had to be translated (given address was treated as virtual) or not (given
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// address was treated as physical)
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bool translated;
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explicit WriteResult(bool translated_) : translated(translated_) {}
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};
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// Try to a write a value to memory at the given address in the given memory space.
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// If the write succeeds, the returned TryWriteResult contains information on whether the given
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// address had to be translated or not. Unlike the HostWrite functions, this does not raise a
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// user-visible alert on failure.
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std::optional<WriteResult>
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HostTryWriteU8(u32 var, const u32 address,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<WriteResult>
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HostTryWriteU16(u32 var, const u32 address,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<WriteResult>
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HostTryWriteU32(u32 var, const u32 address,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<WriteResult>
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HostTryWriteU64(u64 var, const u32 address,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<WriteResult>
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HostTryWriteF32(float var, const u32 address,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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std::optional<WriteResult>
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HostTryWriteF64(double var, const u32 address,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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// Returns whether a read or write to the given address will resolve to a RAM access in the given
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// address space.
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bool HostIsRAMAddress(u32 address, RequestedAddressSpace space = RequestedAddressSpace::Effective);
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// Same as HostIsRAMAddress, but uses IBAT instead of DBAT.
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bool HostIsInstructionRAMAddress(u32 address,
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RequestedAddressSpace space = RequestedAddressSpace::Effective);
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// Routines for the CPU core to access memory.
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// Used by interpreter to read instructions, uses iCache
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u32 Read_Opcode(u32 address);
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struct TryReadInstResult
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{
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bool valid;
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bool from_bat;
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u32 hex;
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u32 physical_address;
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};
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TryReadInstResult TryReadInstruction(u32 address);
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u8 Read_U8(u32 address);
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u16 Read_U16(u32 address);
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u32 Read_U32(u32 address);
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u64 Read_U64(u32 address);
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// Useful helper functions, used by ARM JIT
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float Read_F32(u32 address);
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double Read_F64(u32 address);
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// used by JIT. Return zero-extended 32bit values
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u32 Read_U8_ZX(u32 address);
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u32 Read_U16_ZX(u32 address);
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void Write_U8(u32 var, u32 address);
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void Write_U16(u32 var, u32 address);
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void Write_U32(u32 var, u32 address);
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void Write_U64(u64 var, u32 address);
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void Write_U16_Swap(u32 var, u32 address);
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void Write_U32_Swap(u32 var, u32 address);
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void Write_U64_Swap(u64 var, u32 address);
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// Useful helper functions, used by ARM JIT
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void Write_F64(double var, u32 address);
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void DMA_LCToMemory(u32 mem_address, u32 cache_address, u32 num_blocks);
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void DMA_MemoryToLC(u32 cache_address, u32 mem_address, u32 num_blocks);
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void ClearCacheLine(u32 address); // Zeroes 32 bytes; address should be 32-byte-aligned
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// TLB functions
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void SDRUpdated();
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void InvalidateTLBEntry(u32 address);
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void DBATUpdated();
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void IBATUpdated();
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// Result changes based on the BAT registers and MSR.DR. Returns whether
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// it's safe to optimize a read or write to this address to an unguarded
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// memory access. Does not consider page tables.
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bool IsOptimizableRAMAddress(u32 address);
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u32 IsOptimizableMMIOAccess(u32 address, u32 access_size);
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bool IsOptimizableGatherPipeWrite(u32 address);
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struct TranslateResult
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{
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bool valid = false;
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bool translated = false;
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bool from_bat = false;
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u32 address = 0;
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TranslateResult() = default;
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explicit TranslateResult(u32 address_) : valid(true), address(address_) {}
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TranslateResult(bool from_bat_, u32 address_)
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: valid(true), translated(true), from_bat(from_bat_), address(address_)
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{
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}
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};
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TranslateResult JitCache_TranslateAddress(u32 address);
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constexpr int BAT_INDEX_SHIFT = 17;
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constexpr u32 BAT_PAGE_SIZE = 1 << BAT_INDEX_SHIFT;
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constexpr u32 BAT_PAGE_COUNT = 1 << (32 - BAT_INDEX_SHIFT);
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constexpr u32 BAT_MAPPED_BIT = 0x1;
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constexpr u32 BAT_PHYSICAL_BIT = 0x2;
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constexpr u32 BAT_WI_BIT = 0x4;
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constexpr u32 BAT_RESULT_MASK = UINT32_C(~0x7);
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using BatTable = std::array<u32, BAT_PAGE_COUNT>; // 128 KB
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extern BatTable ibat_table;
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extern BatTable dbat_table;
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inline bool TranslateBatAddess(const BatTable& bat_table, u32* address, bool* wi)
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{
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u32 bat_result = bat_table[*address >> BAT_INDEX_SHIFT];
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if ((bat_result & BAT_MAPPED_BIT) == 0)
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return false;
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*address = (bat_result & BAT_RESULT_MASK) | (*address & (BAT_PAGE_SIZE - 1));
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*wi = (bat_result & BAT_WI_BIT) != 0;
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return true;
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}
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constexpr size_t HW_PAGE_SIZE = 4096;
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constexpr size_t HW_PAGE_MASK = HW_PAGE_SIZE - 1;
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constexpr u32 HW_PAGE_INDEX_SHIFT = 12;
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constexpr u32 HW_PAGE_INDEX_MASK = 0x3f;
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std::optional<u32> GetTranslatedAddress(u32 address);
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} // namespace PowerPC
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