Sintendo 246adf0d6d Jit64: divwx - Eliminate MOV for division by 2
When destination and input registers match, a redundant MOV instruction
can be eliminated.

Before:
8B C7                mov         eax,edi
8B F8                mov         edi,eax
C1 EF 1F             shr         edi,1Fh
03 F8                add         edi,eax
D1 FF                sar         edi,1

After:
8B C7                mov         eax,edi
C1 EF 1F             shr         edi,1Fh
03 F8                add         edi,eax
D1 FF                sar         edi,1
2021-04-24 18:53:21 +02:00
..
2020-12-24 23:38:59 -06:00
2021-01-27 05:15:54 -08:00
2021-03-04 18:41:13 +01:00
2020-12-19 23:22:06 -05:00
2020-12-19 23:22:06 -05:00