dolphin

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Sintendo 47e16133e5 Jit64: divwx - Eliminate XOR for constant dividend

We normally check for division by zero to know if we should set the
destination register to zero with a XOR. However, when the divisor and
destination registers are the same the explicit zeroing can be omitted.
In addition, some of the surrounding branching can be simplified as
well.

Before:
45 85 FF             test        r15d,r15d
75 05                jne         normal_path
45 33 FF             xor         r15d,r15d
EB 0C                jmp         done
normal_path:
B8 5A 00 00 00       mov         eax,5Ah
99                   cdq
41 F7 FF             idiv        eax,r15d
44 8B F8             mov         r15d,eax
done:

After:
45 85 FF             test        r15d,r15d
74 0C                je          done
B8 5A 00 00 00       mov         eax,5Ah
99                   cdq
41 F7 FF             idiv        eax,r15d
44 8B F8             mov         r15d,eax
done:

2021-04-24 21:32:21 +02:00

Android

Merge pull request #9653 from JosJuice/android-import-nand

2021-04-19 21:57:40 +02:00

Core

Jit64: divwx - Eliminate XOR for constant dividend

2021-04-24 21:32:21 +02:00

DSPSpy

DSPSpy: sync Makefile with current devkitPro template

2020-06-08 04:21:41 +01:00

DSPTool

Set console's default language/country/region based on computer settings