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https://github.com/dolphin-emu/dolphin.git
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b9aad3310e
PowerPC.h at this point is pretty much a general glob of stuff, and it's unfortunate, since it means pulling in a lot of unrelated header dependencies and a bunch of other things that don't need to be seen by things that just want to read memory. Breaking this out into its own header keeps all the MMU-related stuff together and also limits the amount of header dependencies being included (the primary motivation for this being the former reason).
122 lines
3.6 KiB
C++
122 lines
3.6 KiB
C++
// Copyright 2018 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include <cstddef>
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#include <string>
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#include "Common/CommonTypes.h"
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namespace PowerPC
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{
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// Routines for debugger UI, cheats, etc. to access emulated memory from the
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// perspective of the CPU. Not for use by core emulation routines.
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// Use "Host_" prefix.
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u8 HostRead_U8(u32 address);
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u16 HostRead_U16(u32 address);
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u32 HostRead_U32(u32 address);
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u64 HostRead_U64(u32 address);
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float HostRead_F32(u32 address);
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double HostRead_F64(u32 address);
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u32 HostRead_Instruction(u32 address);
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void HostWrite_U8(u8 var, u32 address);
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void HostWrite_U16(u16 var, u32 address);
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void HostWrite_U32(u32 var, u32 address);
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void HostWrite_U64(u64 var, u32 address);
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void HostWrite_F32(float var, u32 address);
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void HostWrite_F64(double var, u32 address);
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std::string HostGetString(u32 address, size_t size = 0);
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// Returns whether a read or write to the given address will resolve to a RAM
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// access given the current CPU state.
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bool HostIsRAMAddress(u32 address);
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// Same as HostIsRAMAddress, but uses IBAT instead of DBAT.
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bool HostIsInstructionRAMAddress(u32 address);
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// Routines for the CPU core to access memory.
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// Used by interpreter to read instructions, uses iCache
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u32 Read_Opcode(u32 address);
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struct TryReadInstResult
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{
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bool valid;
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bool from_bat;
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u32 hex;
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u32 physical_address;
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};
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TryReadInstResult TryReadInstruction(u32 address);
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u8 Read_U8(u32 address);
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u16 Read_U16(u32 address);
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u32 Read_U32(u32 address);
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u64 Read_U64(u32 address);
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// Useful helper functions, used by ARM JIT
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float Read_F32(u32 address);
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double Read_F64(u32 address);
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// used by JIT. Return zero-extended 32bit values
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u32 Read_U8_ZX(u32 address);
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u32 Read_U16_ZX(u32 address);
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void Write_U8(u8 var, u32 address);
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void Write_U16(u16 var, u32 address);
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void Write_U32(u32 var, u32 address);
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void Write_U64(u64 var, u32 address);
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void Write_U16_Swap(u16 var, u32 address);
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void Write_U32_Swap(u32 var, u32 address);
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void Write_U64_Swap(u64 var, u32 address);
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// Useful helper functions, used by ARM JIT
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void Write_F64(double var, u32 address);
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void DMA_LCToMemory(u32 mem_address, u32 cache_address, u32 num_blocks);
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void DMA_MemoryToLC(u32 cache_address, u32 mem_address, u32 num_blocks);
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void ClearCacheLine(u32 address); // Zeroes 32 bytes; address should be 32-byte-aligned
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// TLB functions
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void SDRUpdated();
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void InvalidateTLBEntry(u32 address);
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void DBATUpdated();
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void IBATUpdated();
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// Result changes based on the BAT registers and MSR.DR. Returns whether
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// it's safe to optimize a read or write to this address to an unguarded
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// memory access. Does not consider page tables.
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bool IsOptimizableRAMAddress(u32 address);
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u32 IsOptimizableMMIOAccess(u32 address, u32 access_size);
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bool IsOptimizableGatherPipeWrite(u32 address);
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struct TranslateResult
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{
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bool valid;
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bool from_bat;
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u32 address;
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};
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TranslateResult JitCache_TranslateAddress(u32 address);
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constexpr int BAT_INDEX_SHIFT = 17;
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constexpr u32 BAT_PAGE_SIZE = 1 << BAT_INDEX_SHIFT;
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constexpr u32 BAT_MAPPED_BIT = 0x1;
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constexpr u32 BAT_PHYSICAL_BIT = 0x2;
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constexpr u32 BAT_RESULT_MASK = UINT32_C(~0x3);
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using BatTable = std::array<u32, 1 << (32 - BAT_INDEX_SHIFT)>; // 128 KB
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extern BatTable ibat_table;
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extern BatTable dbat_table;
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inline bool TranslateBatAddess(const BatTable& bat_table, u32* address)
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{
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u32 bat_result = bat_table[*address >> BAT_INDEX_SHIFT];
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if ((bat_result & BAT_MAPPED_BIT) == 0)
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return false;
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*address = (bat_result & BAT_RESULT_MASK) | (*address & (BAT_PAGE_SIZE - 1));
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return true;
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}
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} // namespace PowerPC
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