Lioncash 980f1641b5 Interpreter_LoadStore: Generate alignment exceptions if dcbz or dcbz_l are executed with the data cache disabled
This is an exception condition documented within section 4.5.6 in the
architecture reference manual for the PPC 750CL, which also applies to
the Gekko microprocessor.

Also moves dcbz_l's implementation out of Interpreter_Paired and beside
dcbz where it belongs.
2018-04-04 18:44:17 -04:00
..
2017-06-03 18:20:41 -07:00
2017-06-27 00:06:14 -07:00