mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-01-25 15:31:17 +01:00
66b1eb1f08
Because commenting out this behavior fixes Silent Hill Shattered Memories. If this commit breaks any game, please report. PS: There is a EnterCriticalSection in fifo.cpp, which performs the Read Access, but there is no EnterCriticalSection in CommandProcessor.cpp which performs the Write Access, so how can we guarantee the Write Access is atomic? git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4694 8ced0084-cf51-0410-be5f-012b33b47a6e
156 lines
3.8 KiB
C++
156 lines
3.8 KiB
C++
// Copyright (C) 2003 Dolphin Project.
|
|
|
|
// This program is free software: you can redistribute it and/or modify
|
|
// it under the terms of the GNU General Public License as published by
|
|
// the Free Software Foundation, version 2.0.
|
|
|
|
// This program is distributed in the hope that it will be useful,
|
|
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
// GNU General Public License 2.0 for more details.
|
|
|
|
// A copy of the GPL 2.0 should have been included with the program.
|
|
// If not, see http://www.gnu.org/licenses/
|
|
|
|
// Official SVN repository and contact information can be found at
|
|
// http://code.google.com/p/dolphin-emu/
|
|
|
|
#ifndef _COMMANDPROCESSOR_H
|
|
#define _COMMANDPROCESSOR_H
|
|
|
|
#include "Common.h"
|
|
#include "pluginspecs_video.h"
|
|
class PointerWrap;
|
|
|
|
extern bool MT;
|
|
|
|
namespace CommandProcessor
|
|
{
|
|
|
|
extern SCPFifoStruct fifo; //This one is shared between gfx thread and emulator thread
|
|
|
|
// internal hardware addresses
|
|
enum
|
|
{
|
|
STATUS_REGISTER = 0x00,
|
|
CTRL_REGISTER = 0x02,
|
|
CLEAR_REGISTER = 0x04,
|
|
PERF_SELECT = 0x06,
|
|
FIFO_TOKEN_REGISTER = 0x0E,
|
|
FIFO_BOUNDING_BOX_LEFT = 0x10,
|
|
FIFO_BOUNDING_BOX_RIGHT = 0x12,
|
|
FIFO_BOUNDING_BOX_TOP = 0x14,
|
|
FIFO_BOUNDING_BOX_BOTTOM = 0x16,
|
|
FIFO_BASE_LO = 0x20,
|
|
FIFO_BASE_HI = 0x22,
|
|
FIFO_END_LO = 0x24,
|
|
FIFO_END_HI = 0x26,
|
|
FIFO_HI_WATERMARK_LO = 0x28,
|
|
FIFO_HI_WATERMARK_HI = 0x2a,
|
|
FIFO_LO_WATERMARK_LO = 0x2c,
|
|
FIFO_LO_WATERMARK_HI = 0x2e,
|
|
FIFO_RW_DISTANCE_LO = 0x30,
|
|
FIFO_RW_DISTANCE_HI = 0x32,
|
|
FIFO_WRITE_POINTER_LO = 0x34,
|
|
FIFO_WRITE_POINTER_HI = 0x36,
|
|
FIFO_READ_POINTER_LO = 0x38,
|
|
FIFO_READ_POINTER_HI = 0x3A,
|
|
FIFO_BP_LO = 0x3C,
|
|
FIFO_BP_HI = 0x3E,
|
|
CP_PERF0_L = 0x40,
|
|
CP_PERF0_H = 0x42,
|
|
CP_PERF1_L = 0x44,
|
|
CP_PERF1_H = 0x46,
|
|
CP_PERF2_L = 0x48,
|
|
CP_PERF2_H = 0x4a,
|
|
CP_PERF3_L = 0x4c,
|
|
CP_PERF3_H = 0x4e,
|
|
};
|
|
|
|
enum
|
|
{
|
|
GATHER_PIPE_SIZE = 32,
|
|
INT_CAUSE_CP = 0x800
|
|
};
|
|
|
|
// Fifo Status Register
|
|
union UCPStatusReg
|
|
{
|
|
struct
|
|
{
|
|
unsigned OverflowHiWatermark : 1;
|
|
unsigned UnderflowLoWatermark : 1;
|
|
unsigned ReadIdle : 1;
|
|
unsigned CommandIdle : 1;
|
|
unsigned Breakpoint : 1;
|
|
unsigned : 11;
|
|
};
|
|
u16 Hex;
|
|
UCPStatusReg() {Hex = 0; }
|
|
UCPStatusReg(u16 _hex) {Hex = _hex; }
|
|
};
|
|
|
|
// Fifo Control Register
|
|
union UCPCtrlReg
|
|
{
|
|
struct
|
|
{
|
|
unsigned GPReadEnable : 1;
|
|
unsigned CPIntEnable : 1;
|
|
unsigned FifoOverflowIntEnable : 1;
|
|
unsigned FifoUnderflowIntEnable : 1;
|
|
unsigned GPLinkEnable : 1;
|
|
unsigned BPEnable : 1;
|
|
unsigned : 10;
|
|
};
|
|
u16 Hex;
|
|
UCPCtrlReg() {Hex = 0; }
|
|
UCPCtrlReg(u16 _hex) {Hex = _hex; }
|
|
};
|
|
|
|
// Fifo Control Register
|
|
union UCPClearReg
|
|
{
|
|
struct
|
|
{
|
|
unsigned ClearFifoOverflow : 1;
|
|
unsigned ClearFifoUnderflow : 1;
|
|
unsigned ClearMetrices : 1;
|
|
unsigned : 13;
|
|
};
|
|
u16 Hex;
|
|
UCPClearReg() {Hex = 0; }
|
|
UCPClearReg(u16 _hex) {Hex = _hex; }
|
|
};
|
|
|
|
// Init
|
|
void Init();
|
|
void Shutdown();
|
|
void DoState(PointerWrap &p);
|
|
|
|
// Read
|
|
void Read16(u16& _rReturnValue, const u32 _Address);
|
|
void Write16(const u16 _Data, const u32 _Address);
|
|
void Read32(u32& _rReturnValue, const u32 _Address);
|
|
void Write32(const u32 _Data, const u32 _Address);
|
|
|
|
// for CGPFIFO
|
|
void CatchUpGPU();
|
|
void GatherPipeBursted();
|
|
void UpdateFifoRegister();
|
|
void UpdateInterrupts();
|
|
void UpdateInterruptsFromVideoPlugin();
|
|
void SetFifoIdleFromVideoPlugin();
|
|
|
|
bool AllowIdleSkipping();
|
|
|
|
// for DC GP watchdog hack
|
|
void IncrementGPWDToken();
|
|
void WaitForFrameFinish();
|
|
|
|
} // namespace CommandProcessor
|
|
|
|
#endif // _COMMANDPROCESSOR_H
|
|
|
|
|