2009-05-02 23:03:37 +02:00
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/*
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* Copyright (C) 2002 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Library General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <string.h>
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#include "dosbox.h"
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#include "inout.h"
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#include "mixer.h"
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#include "dma.h"
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#include "pic.h"
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#include "hardware.h"
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#define SB_BASE 0x220
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#define SB_IRQ 5
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#define SB_DMA 1
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#define DSP_RESET 0x06
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#define DSP_READ_DATA 0x0A
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#define DSP_WRITE_DATA 0x0C
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#define DSP_WRITE_STATUS 0x0C
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#define DSP_READ_STATUS 0x0E
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#define DSP_NO_COMMAND 0
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#define DSP_MAJOR 2
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#define DSP_MINOR 0
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#define DSP_BUFSIZE 64
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#define DSP_DACSIZE 4096
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enum {DSP_S_RESET,DSP_S_NORMAL,DSP_S_HIGHSPEED};
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enum {
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MODE_NONE,MODE_DAC,
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MODE_PCM_8S,MODE_PCM_8A,
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MODE_ADPCM_4S
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};
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2009-05-02 23:12:18 +02:00
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#if DEBUG_SBLASTER
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2009-05-02 23:03:37 +02:00
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#define SB_DEBUG LOG_DEBUG
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#else
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#define SB_DEBUG
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#endif
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struct SB_INFO {
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Bit16u freq;
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Bitu samples_total;
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Bitu samples_left;
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bool speaker;
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Bit8u time_constant;
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bool use_time_constant;
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Bit8u output_mode;
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/* DSP Stuff */
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Bit8u mode;
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Bit8u state;
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Bit8u cmd;
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Bit8u cmd_len;
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Bit8u cmd_in_pos;
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Bit8u cmd_in[DSP_BUFSIZE];
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Bit8u data_out[DSP_BUFSIZE];
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Bit8u data_out_pos;
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Bit8u data_out_used;
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2009-05-02 23:12:18 +02:00
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struct {
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Bit8u data[DSP_DACSIZE];
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Bitu used;
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Bit8u last;
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} dac;
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2009-05-02 23:03:37 +02:00
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Bit8u test_register;
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/*ADPCM Part */
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Bits adpcm_reference;
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Bits adpcm_scale;
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Bits adpcm_remain;
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/* Hardware setup part */
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Bit32u base;
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Bit8u irq;
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Bit8u dma;
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bool enabled;
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HWBlock hwblock;
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MIXER_Channel * chan;
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};
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static SB_INFO sb;
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static Bit8u e2_value;
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static Bit8u e2_count;
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static char * copyright_string="COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
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static Bit8u DSP_cmd_len[256] = {
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0,0,0,0, 0,2,0,0, 0,0,0,0, 0,0,0,0, // 0x00
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1,0,0,0, 2,0,2,2, 0,0,0,0, 0,0,0,0, // 0x10
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0,0,0,0, 2,0,0,0, 0,0,0,0, 0,0,0,0, // 0x20
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0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, // 0x30
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1,2,2,0, 0,0,0,0, 2,0,0,0, 0,0,0,0, // 0x40
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0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, // 0x50
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0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, // 0x60
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0,0,0,0, 2,2,2,2, 0,0,0,0, 0,0,0,0, // 0x70
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2,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, // 0x80
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0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, // 0x90
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0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, // 0xa0
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3,3,3,3, 3,3,3,3, 3,3,3,3, 3,3,3,3, // 0xb0
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3,3,3,3, 3,3,3,3, 3,3,3,3, 3,3,3,3, // 0xc0
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0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, // 0xd0
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1,0,1,0, 1,0,0,0, 0,0,0,0, 0,0,0,0, // 0xe0
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0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 // 0xf0
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};
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static int E2_incr_table[4][9] = {
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{ 0x01, -0x02, -0x04, 0x08, -0x10, 0x20, 0x40, -0x80, -106 },
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{ -0x01, 0x02, -0x04, 0x08, 0x10, -0x20, 0x40, -0x80, 165 },
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{ -0x01, 0x02, 0x04, -0x08, 0x10, -0x20, -0x40, 0x80, -151 },
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{ 0x01, -0x02, 0x04, -0x08, -0x10, 0x20, -0x40, 0x80, 90 }
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};
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#ifndef max
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#define max(a,b) ((a)>(b)?(a):(b))
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#endif
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#ifndef min
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#define min(a,b) ((a)<(b)?(a):(b))
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#endif
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static void DSP_SetSpeaker(bool how) {
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/* This should just set the mixer value */
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MIXER_Enable(sb.chan,how);
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sb.speaker=how;
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}
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static void DSP_HaltDMA(void) {
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}
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static INLINE void DSP_FlushData(void) {
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sb.data_out_used=0;
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sb.data_out_pos=0;
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}
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static void DSP_SetSampleRate(Bit32u rate) {
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/* This directly changes the mixer */
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}
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static void DSP_StopDMA(void) {
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sb.mode=MODE_NONE;
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// MIXER_SetMode(sb.chan,MIXER_8MONO);
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// MIXER_SetFreq(sb.chan,22050);
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}
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static void DSP_StartDMATranfser(Bit8u mode) {
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sb.samples_left=sb.samples_total;
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if (sb.use_time_constant) {
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sb.freq=(1000000 / (256 - sb.time_constant));
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};
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switch (mode) {
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case MODE_PCM_8S:
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MIXER_SetFreq(sb.chan,sb.freq);
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SB_DEBUG("DSP:PCM 8 bit single cycle rate %d size %d",sb.freq,sb.samples_total);
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break;
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case MODE_PCM_8A:
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MIXER_SetFreq(sb.chan,sb.freq);
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SB_DEBUG("DSP:PCM 8 bit auto init rate %d size %d",sb.freq,sb.samples_total);
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break;
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case MODE_ADPCM_4S:
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2009-05-02 23:12:18 +02:00
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MIXER_SetFreq(sb.chan,sb.freq);
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2009-05-02 23:03:37 +02:00
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SB_DEBUG("DSP:ADPCM 4 bit single cycle rate %d size %X",sb.freq,sb.samples_total);
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break;
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default:
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LOG_ERROR("DSP:Illegal transfer mode %d",mode);
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return;
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}
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/* Hack to enable dma transfer when game has speaker disabled */
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DSP_SetSpeaker(true);
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sb.mode=mode;
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}
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static void DSP_AddData(Bit8u val) {
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if (sb.data_out_used<DSP_BUFSIZE) {
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Bit32u start=sb.data_out_used+sb.data_out_pos;
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if (start>=DSP_BUFSIZE) start-=DSP_BUFSIZE;
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sb.data_out[start]=val;
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sb.data_out_used++;
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} else {
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LOG_ERROR("SB:DSP:Data Output buffer full this is weird");
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}
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}
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static void DSP_Reset(void) {
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sb.mode=MODE_NONE;
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sb.cmd_len=0;
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sb.cmd_in_pos=0;
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sb.use_time_constant=false;
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2009-05-02 23:12:18 +02:00
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sb.dac.used=0;
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sb.dac.last=0x80;
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2009-05-02 23:03:37 +02:00
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e2_value=0xaa;
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e2_count=0;
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DSP_HaltDMA();
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MIXER_SetFreq(sb.chan,22050);
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MIXER_SetMode(sb.chan,MIXER_8MONO);
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DSP_SetSpeaker(false);
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}
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static void DSP_DoReset(Bit8u val) {
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if (val&1!=0) {
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//TODO Get out of highspeed mode
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DSP_Reset();
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sb.state=DSP_S_RESET;
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} else {
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DSP_FlushData();
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DSP_AddData(0xaa);
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sb.state=DSP_S_NORMAL;
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}
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};
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static bool dac_warn=false;
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static void DSP_DoCommand(void) {
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switch (sb.cmd) {
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case 0x10: /* Direct DAC */
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sb.mode=MODE_DAC;
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2009-05-02 23:12:18 +02:00
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if (sb.dac.used<DSP_DACSIZE) {
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sb.dac.data[sb.dac.used++]=sb.cmd_in[0];
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2009-05-02 23:03:37 +02:00
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}
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break;
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case 0x14: /* Singe Cycle 8-Bit DMA */
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/* Set the length of the transfer */
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sb.samples_total=1+sb.cmd_in[0]+(sb.cmd_in[1] << 8);
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DSP_StartDMATranfser(MODE_PCM_8S);
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break;
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case 0x1c: /* Auto Init 8-bit DMA */
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DSP_StartDMATranfser(MODE_PCM_8A);
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break;
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case 0x40: /* Set Timeconstant */
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sb.use_time_constant=true;
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sb.time_constant=sb.cmd_in[0];
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break;
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case 0x48: /* Set DMA Block Size */
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sb.samples_total=1+sb.cmd_in[0]+(sb.cmd_in[1] << 8);
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break;
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case 0x75: /* 075h : Single Cycle 4-bit ADPCM Reference */
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sb.adpcm_scale=0;
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sb.adpcm_reference=-1;
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sb.adpcm_remain=-1;
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case 0x74: /* 074h : Single Cycle 4-bit ADPCM */
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sb.samples_total=1+sb.cmd_in[0]+(sb.cmd_in[1] << 8);
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DSP_StartDMATranfser(MODE_ADPCM_4S);
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break;
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case 0xd0: /* Halt 8-bit DMA */
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DSP_HaltDMA();
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break;
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case 0xd1: /* Enable Speaker */
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DSP_SetSpeaker(true);
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break;
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case 0xd3: /* Disable Speaker */
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DSP_SetSpeaker(false);
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break;
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case 0xe0: /* DSP Identification - SB2.0+ */
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DSP_FlushData();
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DSP_AddData(~sb.cmd_in[0]);
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break;
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case 0xe1: /* Get DSP Version */
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DSP_FlushData();
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DSP_AddData(DSP_MAJOR);
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DSP_AddData(DSP_MINOR);
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break;
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case 0xe2: /* Weird DMA identification write routine */
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{
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/*
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for (Bit8u i = 0; i < 8; i++)
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if ((sb.cmd_in[0] >> i) & 0x01) m_E2Value += E2_incr_table[m_E2Count % 4][i];
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m_E2Value += E2_incr_table[m_E2Count % 4][8];
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m_E2Count++;
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*/
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//TODO Ofcourse :)
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}
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break;
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case 0xe3: /* DSP Copyright */
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{
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DSP_FlushData();
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for (Bit32u i=0;i<=strlen(copyright_string);i++) {
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DSP_AddData(copyright_string[i]);
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}
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}
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break;
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case 0xe4: /* Write Test Register */
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sb.test_register=sb.cmd_in[0];
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break;
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case 0xe8: /* Read Test Register */
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DSP_FlushData();
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DSP_AddData(sb.test_register);;
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break;
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case 0xf2: /* Trigger 8bit IRQ */
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DSP_FlushData();
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DSP_AddData(0xaa);
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PIC_ActivateIRQ(sb.irq);
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break;
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default:
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LOG_WARN("SB:DSP:Unhandled command %2X",sb.cmd);
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}
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sb.cmd=DSP_NO_COMMAND;
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sb.cmd_len=0;
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sb.cmd_in_pos=0;
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}
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static void DSP_DoWrite(Bit8u val) {
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switch (sb.cmd) {
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case DSP_NO_COMMAND:
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sb.cmd=val;
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sb.cmd_len=DSP_cmd_len[val];
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sb.cmd_in_pos=0;
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if (!sb.cmd_len) DSP_DoCommand();
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break;
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default:
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sb.cmd_in[sb.cmd_in_pos]=val;
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sb.cmd_in_pos++;
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if (sb.cmd_in_pos>=sb.cmd_len) DSP_DoCommand();
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}
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}
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static Bit8u DSP_ReadData(void) {
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Bit8u data=0;
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if (sb.data_out_used) {
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|
data=sb.data_out[sb.data_out_pos];
|
|
|
|
sb.data_out_pos++;
|
|
|
|
if (sb.data_out_pos>=DSP_BUFSIZE) sb.data_out_pos-=DSP_BUFSIZE;
|
|
|
|
sb.data_out_used--;
|
|
|
|
}
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
static Bit8u read_sb(Bit32u port) {
|
|
|
|
switch (port-sb.base) {
|
|
|
|
case DSP_READ_DATA:
|
|
|
|
return DSP_ReadData();
|
|
|
|
case DSP_READ_STATUS:
|
|
|
|
//TODO Acknowledge 8bit irq
|
|
|
|
//TODO See for high speed dma :)
|
|
|
|
if (sb.data_out_used) return 0xff;
|
|
|
|
else return 0x7f;
|
|
|
|
case DSP_WRITE_STATUS:
|
|
|
|
switch (sb.state) {
|
|
|
|
case DSP_S_NORMAL:
|
|
|
|
return 0x7f;
|
|
|
|
case DSP_S_RESET:
|
|
|
|
return 0xff;
|
|
|
|
}
|
|
|
|
return 0xff;
|
|
|
|
/* For now loop FM Stuff to 0x388 */
|
|
|
|
case 0x00: case 0x02: case 0x08:
|
|
|
|
return IO_Read(0x388);
|
|
|
|
case DSP_RESET:
|
|
|
|
return 0xff;
|
|
|
|
default:
|
|
|
|
LOG_WARN("SB:Unhandled read from SB Port %4X",port);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0xff;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void write_sb(Bit32u port,Bit8u val) {
|
|
|
|
switch (port-sb.base) {
|
|
|
|
case DSP_RESET:
|
|
|
|
DSP_DoReset(val);
|
|
|
|
break;
|
|
|
|
case DSP_WRITE_DATA:
|
|
|
|
DSP_DoWrite(val);
|
|
|
|
break;
|
|
|
|
/* For now loop FM Stuff to 0x388 */
|
|
|
|
case 0x00: case 0x02: case 0x08:
|
|
|
|
IO_Write(0x388,val);
|
|
|
|
break;
|
|
|
|
case 0x01: case 0x03: case 0x09:
|
|
|
|
IO_Write(0x389,val);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
LOG_WARN("SB:Unhandled write to SB Port %4X",port);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
INLINE Bit8u decode_ADPCM_4_sample(
|
|
|
|
Bit8u sample,
|
|
|
|
Bits& reference,
|
|
|
|
Bits& scale)
|
|
|
|
{
|
|
|
|
static int scaleMap[8] = { -2, -1, 0, 0, 1, 1, 1, 1 };
|
|
|
|
|
|
|
|
if (sample & 0x08) {
|
|
|
|
reference = max(0x00, reference - ((sample & 0x07) << scale));
|
|
|
|
} else {
|
|
|
|
reference = min(0xff, reference + ((sample & 0x07) << scale));
|
|
|
|
}
|
|
|
|
|
|
|
|
scale = max(2, min(6, scaleMap[sample & 0x07]));
|
|
|
|
|
|
|
|
return (Bit8u)reference;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void SBLASTER_CallBack(Bit8u * stream,Bit32u len) {
|
|
|
|
unsigned char tmpbuf[65536];
|
|
|
|
if (!len) return;
|
|
|
|
switch (sb.mode) {
|
|
|
|
case MODE_NONE:
|
|
|
|
/* If there isn't a mode it's 8 bit mono mode speaker should be disabled normally */
|
|
|
|
memset(stream,0x80,len);
|
|
|
|
break;
|
|
|
|
case MODE_DAC:
|
|
|
|
/* Stretch the inputted dac data over len samples */
|
|
|
|
{
|
2009-05-02 23:12:18 +02:00
|
|
|
if (sb.dac.used) {
|
|
|
|
Bitu dac_add=(sb.dac.used<<16)/len;
|
|
|
|
Bitu dac_pos=0;
|
|
|
|
while (len-->0) {
|
|
|
|
*(stream++)=sb.dac.data[dac_pos>>16];
|
|
|
|
dac_pos+=dac_add;
|
|
|
|
}
|
|
|
|
dac_pos-=dac_add;
|
|
|
|
sb.dac.last=sb.dac.data[dac_pos>>16];
|
|
|
|
sb.dac.used=0;
|
|
|
|
} else {
|
|
|
|
memset(stream,sb.dac.last,len);
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case MODE_PCM_8A:
|
2009-05-02 23:12:18 +02:00
|
|
|
{
|
|
|
|
Bit16u read=DMA_8_Read(sb.dma,stream,(Bit16u)len);
|
|
|
|
if (sb.samples_left>read) {
|
|
|
|
sb.samples_left-=read;
|
|
|
|
} else {
|
|
|
|
if (read>(sb.samples_total+sb.samples_left)) sb.samples_left=sb.samples_total;
|
|
|
|
else sb.samples_left=sb.samples_total+sb.samples_left-read;
|
|
|
|
PIC_ActivateIRQ(sb.irq);
|
|
|
|
}
|
|
|
|
if (read<len) memset(stream+read,0x80,len-read);
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case MODE_PCM_8S:
|
2009-05-02 23:12:18 +02:00
|
|
|
{
|
|
|
|
Bit16u read;
|
|
|
|
if (sb.samples_left>=len) {
|
|
|
|
read=DMA_8_Read(sb.dma,stream,(Bit16u)len);
|
|
|
|
sb.samples_left-=read;
|
|
|
|
} else {
|
|
|
|
read=DMA_8_Read(sb.dma,stream,(Bit16u)sb.samples_left);
|
|
|
|
sb.samples_left=0;
|
|
|
|
}
|
|
|
|
if (read<len) memset(stream+read,0x80,len-read);
|
|
|
|
if (sb.samples_left==0) {
|
|
|
|
DSP_StopDMA();
|
|
|
|
PIC_ActivateIRQ(sb.irq);
|
|
|
|
}
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case MODE_ADPCM_4S:
|
|
|
|
{
|
|
|
|
if (sb.adpcm_remain>=0) {
|
|
|
|
*stream++=decode_ADPCM_4_sample((Bit8u)sb.adpcm_remain,sb.adpcm_reference,sb.adpcm_scale);
|
|
|
|
len--;
|
|
|
|
}
|
|
|
|
Bitu dma_size=len/2+(len&1); //Amount of bytes that need to be transferred
|
|
|
|
Bit8u * decode_pos=tmpbuf;
|
|
|
|
if (sb.adpcm_reference < 0) {
|
|
|
|
dma_size++;
|
|
|
|
}
|
2009-05-02 23:12:18 +02:00
|
|
|
Bit16u read;
|
2009-05-02 23:03:37 +02:00
|
|
|
/* Read from the DMA Channel */
|
|
|
|
if (sb.samples_left>=dma_size) {
|
2009-05-02 23:12:18 +02:00
|
|
|
read=DMA_8_Read(sb.dma,decode_pos,(Bit16u)dma_size);
|
2009-05-02 23:03:37 +02:00
|
|
|
} else if (sb.samples_left<dma_size) {
|
2009-05-02 23:12:18 +02:00
|
|
|
read=DMA_8_Read(sb.dma,decode_pos,(Bit16u)sb.samples_left);
|
|
|
|
}
|
|
|
|
sb.samples_left-=read;
|
|
|
|
if (sb.adpcm_reference < 0 && read) {
|
|
|
|
sb.adpcm_reference=*decode_pos++;
|
|
|
|
read--;
|
|
|
|
}
|
|
|
|
if ((read*2U)<(Bitu)len) {
|
|
|
|
memset(stream+read*2,0x80,len-read*2);
|
|
|
|
len=read*2;
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|
|
|
|
if (sb.samples_left==0) {
|
|
|
|
DSP_StopDMA();
|
|
|
|
PIC_ActivateIRQ(sb.irq);
|
|
|
|
}
|
2009-05-02 23:12:18 +02:00
|
|
|
if (!read) return;
|
|
|
|
/* Decode the actual samples read from dma */
|
2009-05-02 23:03:37 +02:00
|
|
|
for (Bitu i=len/2;i>0;i--) {
|
|
|
|
*stream++=decode_ADPCM_4_sample(*decode_pos >> 4,sb.adpcm_reference,sb.adpcm_scale);
|
|
|
|
*stream++=decode_ADPCM_4_sample(*decode_pos++ ,sb.adpcm_reference,sb.adpcm_scale);
|
|
|
|
}
|
|
|
|
if (len & 1) {
|
|
|
|
*stream++=decode_ADPCM_4_sample(*decode_pos >> 4,sb.adpcm_reference,sb.adpcm_scale);
|
|
|
|
sb.adpcm_remain=*decode_pos & 0xf;
|
|
|
|
} else {
|
|
|
|
sb.adpcm_remain=-1;
|
|
|
|
}
|
|
|
|
}
|
2009-05-02 23:12:18 +02:00
|
|
|
break;
|
|
|
|
} /* End switch */
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static bool SB_enabled;
|
|
|
|
|
|
|
|
static void SB_Enable(bool enable) {
|
|
|
|
Bitu i;
|
|
|
|
if (enable) {
|
|
|
|
sb.enabled=true;
|
|
|
|
for (i=sb.base+4;i<sb.base+0xf;i++) {
|
|
|
|
IO_RegisterReadHandler(i,read_sb,"SB");
|
|
|
|
IO_RegisterWriteHandler(i,write_sb,"SB");
|
|
|
|
}
|
|
|
|
PIC_RegisterIRQ(sb.irq,0,"SB");
|
|
|
|
DSP_Reset();
|
|
|
|
} else {
|
|
|
|
sb.enabled=false;
|
|
|
|
PIC_FreeIRQ(sb.irq);
|
|
|
|
for (i=sb.base+4;i<sb.base+0xf;i++){
|
|
|
|
IO_FreeReadHandler(i);
|
|
|
|
IO_FreeWriteHandler(i);
|
|
|
|
};
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void SB_InputHandler(char * line) {
|
|
|
|
bool s_off,s_on,s_base,s_irq,s_dma;
|
|
|
|
Bits n_base,n_irq,n_dma;
|
|
|
|
s_off=ScanCMDBool(line,"OFF");
|
|
|
|
s_on=ScanCMDBool(line,"ON");
|
|
|
|
s_base=ScanCMDHex(line,"BASE",&n_base);
|
|
|
|
s_irq=ScanCMDHex(line,"IRQ",&n_irq);
|
|
|
|
s_dma=ScanCMDHex(line,"DMA",&n_dma);
|
|
|
|
char * rem=ScanCMDRemain(line);
|
|
|
|
if (rem) {
|
|
|
|
sprintf(line,"Illegal Switch");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (s_on && s_off) {
|
|
|
|
sprintf(line,"Can't use /ON and /OFF at the same time");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
bool was_enabled=sb.enabled;
|
|
|
|
if (sb.enabled) SB_Enable(false);
|
|
|
|
if (s_base) {
|
|
|
|
sb.base=n_base;
|
|
|
|
}
|
|
|
|
if (s_irq) {
|
|
|
|
sb.irq=n_irq;
|
|
|
|
}
|
|
|
|
if (s_dma) {
|
|
|
|
sb.dma=n_dma;
|
|
|
|
}
|
|
|
|
if (s_on) {
|
|
|
|
SB_Enable(true);
|
|
|
|
}
|
|
|
|
if (s_off) {
|
|
|
|
SB_Enable(false);
|
|
|
|
sprintf(line,"Sound Blaster has been disabled");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (was_enabled) SB_Enable(true);
|
|
|
|
sprintf(line,"Sound Blaster enabled with IO %X IRQ %X DMA %X",sb.base,sb.irq,sb.dma);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void SB_OutputHandler (char * towrite) {
|
|
|
|
if(sb.enabled) {
|
|
|
|
sprintf(towrite,"IO %X IRQ %X DMA %X",sb.base,sb.irq,sb.dma);
|
|
|
|
} else {
|
|
|
|
sprintf(towrite,"Disabled");
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void SBLASTER_Init(void) {
|
|
|
|
sb.chan=MIXER_AddChannel(&SBLASTER_CallBack,22050,"SBLASTER");
|
|
|
|
MIXER_Enable(sb.chan,false);
|
|
|
|
sb.state=DSP_S_NORMAL;
|
|
|
|
/* Setup the hardware handler part */
|
|
|
|
sb.base=SB_BASE;
|
|
|
|
sb.irq=SB_IRQ;
|
|
|
|
sb.dma=SB_DMA;
|
|
|
|
SB_Enable(true);
|
|
|
|
|
|
|
|
sb.hwblock.dev_name="SB";
|
|
|
|
sb.hwblock.full_name="Sound Blaster 1.5";
|
|
|
|
sb.hwblock.next=0;
|
|
|
|
sb.hwblock.help=
|
|
|
|
"/ON Enables SB\n"
|
|
|
|
"/OFF Disables SB\n"
|
|
|
|
"/BASE XXX Set Base Addres 200-260\n"
|
|
|
|
"/IRQ X Set IRQ 1-9\n"
|
|
|
|
"/DMA X Set 8-Bit DMA Channel 0-3\n";
|
|
|
|
sb.hwblock.get_input=SB_InputHandler;
|
|
|
|
sb.hwblock.show_status=SB_OutputHandler;
|
|
|
|
HW_Register(&sb.hwblock);
|
|
|
|
|
|
|
|
|
|
|
|
SHELL_AddAutoexec("SET BLASTER=A%3X I%d D%d T3",sb.base,sb.irq,sb.dma);
|
|
|
|
}
|