2010-11-05 05:55:33 +01:00
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/*
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2011-06-22 06:18:55 +02:00
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* Copyright (C) 2002-2011 The DOSBox Team
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2010-11-05 05:55:33 +01:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <stdlib.h>
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#include "dosbox.h"
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#include "inout.h"
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#include "vga.h"
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#include "debug.h"
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#include "cpu.h"
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#include "video.h"
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#include "pic.h"
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#define crtc(blah) vga.crtc.blah
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void VGA_MapMMIO(void);
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void VGA_UnmapMMIO(void);
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void vga_write_p3d5(Bitu port,Bitu val,Bitu iolen);
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Bitu DEBUG_EnableDebugger(void);
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void vga_write_p3d4(Bitu port,Bitu val,Bitu iolen) {
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crtc(index)=val;
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}
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Bitu vga_read_p3d4(Bitu port,Bitu iolen) {
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return crtc(index);
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}
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void vga_write_p3d5(Bitu port,Bitu val,Bitu iolen) {
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// if (crtc(index)>0x18) LOG_MSG("VGA CRCT write %X to reg %X",val,crtc(index));
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switch(crtc(index)) {
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case 0x00: /* Horizontal Total Register */
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if (crtc(read_only)) break;
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crtc(horizontal_total)=val;
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/* 0-7 Horizontal Total Character Clocks-5 */
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break;
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case 0x01: /* Horizontal Display End Register */
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if (crtc(read_only)) break;
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if (val != crtc(horizontal_display_end)) {
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crtc(horizontal_display_end)=val;
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VGA_StartResize();
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}
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/* 0-7 Number of Character Clocks Displayed -1 */
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break;
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case 0x02: /* Start Horizontal Blanking Register */
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if (crtc(read_only)) break;
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crtc(start_horizontal_blanking)=val;
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/* 0-7 The count at which Horizontal Blanking starts */
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break;
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case 0x03: /* End Horizontal Blanking Register */
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if (crtc(read_only)) break;
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crtc(end_horizontal_blanking)=val;
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/*
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0-4 Horizontal Blanking ends when the last 6 bits of the character
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counter equals this field. Bit 5 is at 3d4h index 5 bit 7.
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5-6 Number of character clocks to delay start of display after Horizontal
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Total has been reached.
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7 Access to Vertical Retrace registers if set. If clear reads to 3d4h
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index 10h and 11h access the Lightpen read back registers ??
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*/
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break;
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case 0x04: /* Start Horizontal Retrace Register */
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if (crtc(read_only)) break;
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crtc(start_horizontal_retrace)=val;
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/* 0-7 Horizontal Retrace starts when the Character Counter reaches this value. */
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break;
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case 0x05: /* End Horizontal Retrace Register */
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if (crtc(read_only)) break;
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crtc(end_horizontal_retrace)=val;
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/*
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0-4 Horizontal Retrace ends when the last 5 bits of the character counter
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equals this value.
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5-6 Number of character clocks to delay start of display after Horizontal
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Retrace.
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7 bit 5 of the End Horizontal Blanking count (See 3d4h index 3 bit 0-4)
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*/
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break;
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case 0x06: /* Vertical Total Register */
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if (crtc(read_only)) break;
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if (val != crtc(vertical_total)) {
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crtc(vertical_total)=val;
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VGA_StartResize();
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}
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/* 0-7 Lower 8 bits of the Vertical Total. Bit 8 is found in 3d4h index 7
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bit 0. Bit 9 is found in 3d4h index 7 bit 5.
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Note: For the VGA this value is the number of scan lines in the display -2.
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*/
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break;
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case 0x07: /* Overflow Register */
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//Line compare bit ignores read only */
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vga.config.line_compare=(vga.config.line_compare & 0x6ff) | (val & 0x10) << 4;
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if (crtc(read_only)) break;
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if ((vga.crtc.overflow ^ val) & 0xd6) {
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crtc(overflow)=val;
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VGA_StartResize();
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} else crtc(overflow)=val;
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/*
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0 Bit 8 of Vertical Total (3d4h index 6)
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1 Bit 8 of Vertical Display End (3d4h index 12h)
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2 Bit 8 of Vertical Retrace Start (3d4h index 10h)
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3 Bit 8 of Start Vertical Blanking (3d4h index 15h)
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4 Bit 8 of Line Compare Register (3d4h index 18h)
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5 Bit 9 of Vertical Total (3d4h index 6)
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6 Bit 9 of Vertical Display End (3d4h index 12h)
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7 Bit 9 of Vertical Retrace Start (3d4h index 10h)
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*/
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break;
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case 0x08: /* Preset Row Scan Register */
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crtc(preset_row_scan)=val;
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vga.config.hlines_skip=val&31;
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if (IS_VGA_ARCH) vga.config.bytes_skip=(val>>5)&3;
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else vga.config.bytes_skip=0;
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// LOG_DEBUG("Skip lines %d bytes %d",vga.config.hlines_skip,vga.config.bytes_skip);
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/*
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0-4 Number of lines we have scrolled down in the first character row.
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Provides Smooth Vertical Scrolling.b
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5-6 Number of bytes to skip at the start of scanline. Provides Smooth
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Horizontal Scrolling together with the Horizontal Panning Register
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(3C0h index 13h).
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*/
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break;
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case 0x09: /* Maximum Scan Line Register */
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if (IS_VGA_ARCH)
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vga.config.line_compare=(vga.config.line_compare & 0x5ff)|(val&0x40)<<3;
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if (IS_VGA_ARCH && (svgaCard==SVGA_None) && (vga.mode==M_EGA || vga.mode==M_VGA)) {
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// in vgaonly mode we take special care of line repeats (excluding CGA modes)
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if ((vga.crtc.maximum_scan_line ^ val) & 0x20) {
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crtc(maximum_scan_line)=val;
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VGA_StartResize();
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} else {
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crtc(maximum_scan_line)=val;
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}
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vga.draw.address_line_total = (val &0x1F) + 1;
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if (val&0x80) vga.draw.address_line_total*=2;
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} else {
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if ((vga.crtc.maximum_scan_line ^ val) & 0xbf) {
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crtc(maximum_scan_line)=val;
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VGA_StartResize();
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} else {
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crtc(maximum_scan_line)=val;
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}
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}
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/*
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0-4 Number of scan lines in a character row -1. In graphics modes this is
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the number of times (-1) the line is displayed before passing on to
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the next line (0: normal, 1: double, 2: triple...).
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This is independent of bit 7, except in CGA modes which seems to
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require this field to be 1 and bit 7 to be set to work.
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5 Bit 9 of Start Vertical Blanking
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6 Bit 9 of Line Compare Register
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7 Doubles each scan line if set. I.e. displays 200 lines on a 400 display.
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*/
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break;
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case 0x0A: /* Cursor Start Register */
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crtc(cursor_start)=val;
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vga.draw.cursor.sline=val&0x1f;
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if (IS_VGA_ARCH) vga.draw.cursor.enabled=!(val&0x20);
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else vga.draw.cursor.enabled=true;
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/*
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0-4 First scanline of cursor within character.
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5 Turns Cursor off if set
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*/
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break;
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case 0x0B: /* Cursor End Register */
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crtc(cursor_end)=val;
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vga.draw.cursor.eline=val&0x1f;
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vga.draw.cursor.delay=(val>>5)&0x3;
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/*
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0-4 Last scanline of cursor within character
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5-6 Delay of cursor data in character clocks.
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*/
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break;
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case 0x0C: /* Start Address High Register */
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crtc(start_address_high)=val;
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vga.config.display_start=(vga.config.display_start & 0xFF00FF)| (val << 8);
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/* 0-7 Upper 8 bits of the start address of the display buffer */
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break;
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case 0x0D: /* Start Address Low Register */
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crtc(start_address_low)=val;
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vga.config.display_start=(vga.config.display_start & 0xFFFF00)| val;
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/* 0-7 Lower 8 bits of the start address of the display buffer */
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break;
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case 0x0E: /*Cursor Location High Register */
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crtc(cursor_location_high)=val;
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vga.config.cursor_start&=0xff00ff;
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vga.config.cursor_start|=val << 8;
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/* 0-7 Upper 8 bits of the address of the cursor */
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break;
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case 0x0F: /* Cursor Location Low Register */
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//TODO update cursor on screen
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crtc(cursor_location_low)=val;
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vga.config.cursor_start&=0xffff00;
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vga.config.cursor_start|=val;
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/* 0-7 Lower 8 bits of the address of the cursor */
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break;
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case 0x10: /* Vertical Retrace Start Register */
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crtc(vertical_retrace_start)=val;
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/*
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0-7 Lower 8 bits of Vertical Retrace Start. Vertical Retrace starts when
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the line counter reaches this value. Bit 8 is found in 3d4h index 7
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bit 2. Bit 9 is found in 3d4h index 7 bit 7.
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*/
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break;
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case 0x11: /* Vertical Retrace End Register */
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crtc(vertical_retrace_end)=val;
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if (IS_EGAVGA_ARCH && !(val & 0x10)) {
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vga.draw.vret_triggered=false;
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if (GCC_UNLIKELY(machine==MCH_EGA)) PIC_DeActivateIRQ(9);
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}
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if (IS_VGA_ARCH) crtc(read_only)=(val & 128)>0;
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else crtc(read_only)=false;
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/*
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0-3 Vertical Retrace ends when the last 4 bits of the line counter equals
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this value.
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4 if clear Clears pending Vertical Interrupts.
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5 Vertical Interrupts (IRQ 2) disabled if set. Can usually be left
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disabled, but some systems (including PS/2) require it to be enabled.
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6 If set selects 5 refresh cycles per scanline rather than 3.
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7 Disables writing to registers 0-7 if set 3d4h index 7 bit 4 is not
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affected by this bit.
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*/
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break;
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case 0x12: /* Vertical Display End Register */
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if (val!=crtc(vertical_display_end)) {
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if (abs((Bits)val-(Bits)crtc(vertical_display_end))<3) {
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// delay small vde changes a bit to avoid screen resizing
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// if they are reverted in a short timeframe
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PIC_RemoveEvents(VGA_SetupDrawing);
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vga.draw.resizing=false;
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crtc(vertical_display_end)=val;
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VGA_StartResize(150);
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} else {
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crtc(vertical_display_end)=val;
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VGA_StartResize();
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}
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}
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/*
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0-7 Lower 8 bits of Vertical Display End. The display ends when the line
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counter reaches this value. Bit 8 is found in 3d4h index 7 bit 1.
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Bit 9 is found in 3d4h index 7 bit 6.
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*/
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break;
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case 0x13: /* Offset register */
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crtc(offset)=val;
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vga.config.scan_len&=0x300;
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vga.config.scan_len|=val;
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VGA_CheckScanLength();
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/*
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0-7 Number of bytes in a scanline / K. Where K is 2 for byte mode, 4 for
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word mode and 8 for Double Word mode.
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*/
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break;
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case 0x14: /* Underline Location Register */
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crtc(underline_location)=val;
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if (IS_VGA_ARCH) {
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//Byte,word,dword mode
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if ( crtc(underline_location) & 0x20 )
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vga.config.addr_shift = 2;
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else if ( crtc( mode_control) & 0x40 )
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vga.config.addr_shift = 0;
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else
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vga.config.addr_shift = 1;
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} else {
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vga.config.addr_shift = 1;
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}
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/*
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0-4 Position of underline within Character cell.
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5 If set memory address is only changed every fourth character clock.
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6 Double Word mode addressing if set
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*/
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break;
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case 0x15: /* Start Vertical Blank Register */
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if (val!=crtc(start_vertical_blanking)) {
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crtc(start_vertical_blanking)=val;
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VGA_StartResize();
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}
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/*
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0-7 Lower 8 bits of Vertical Blank Start. Vertical blanking starts when
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the line counter reaches this value. Bit 8 is found in 3d4h index 7
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bit 3.
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*/
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break;
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case 0x16: /* End Vertical Blank Register */
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2010-12-06 03:42:22 +01:00
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if (val!=crtc(end_vertical_blanking)) {
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crtc(end_vertical_blanking)=val;
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VGA_StartResize();
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}
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/*
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2010-11-05 05:55:33 +01:00
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0-6 Vertical blanking stops when the lower 7 bits of the line counter
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equals this field. Some SVGA chips uses all 8 bits!
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2010-12-06 03:42:22 +01:00
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IBM actually says bits 0-7.
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2010-11-05 05:55:33 +01:00
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*/
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break;
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case 0x17: /* Mode Control Register */
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crtc(mode_control)=val;
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vga.tandy.line_mask = (~val) & 3;
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//Byte,word,dword mode
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if ( crtc(underline_location) & 0x20 )
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vga.config.addr_shift = 2;
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else if ( crtc( mode_control) & 0x40 )
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vga.config.addr_shift = 0;
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else
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vga.config.addr_shift = 1;
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if ( vga.tandy.line_mask ) {
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vga.tandy.line_shift = 13;
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vga.tandy.addr_mask = (1 << 13) - 1;
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} else {
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vga.tandy.addr_mask = ~0;
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vga.tandy.line_shift = 0;
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}
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//Should we really need to do a determinemode here?
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// VGA_DetermineMode();
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/*
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0 If clear use CGA compatible memory addressing system
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by substituting character row scan counter bit 0 for address bit 13,
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thus creating 2 banks for even and odd scan lines.
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1 If clear use Hercules compatible memory addressing system by
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substituting character row scan counter bit 1 for address bit 14,
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thus creating 4 banks.
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2 If set increase scan line counter only every second line.
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3 If set increase memory address counter only every other character clock.
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5 When in Word Mode bit 15 is rotated to bit 0 if this bit is set else
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bit 13 is rotated into bit 0.
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6 If clear system is in word mode. Addresses are rotated 1 position up
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bringing either bit 13 or 15 into bit 0.
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7 Clearing this bit will reset the display system until the bit is set again.
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*/
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break;
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case 0x18: /* Line Compare Register */
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crtc(line_compare)=val;
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vga.config.line_compare=(vga.config.line_compare & 0x700) | val;
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/*
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0-7 Lower 8 bits of the Line Compare. When the Line counter reaches this
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value, the display address wraps to 0. Provides Split Screen
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facilities. Bit 8 is found in 3d4h index 7 bit 4.
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Bit 9 is found in 3d4h index 9 bit 6.
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*/
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break;
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default:
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if (svga.write_p3d5) {
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svga.write_p3d5(crtc(index), val, iolen);
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} else {
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LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:CRTC:Write to unknown index %X",crtc(index));
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}
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break;
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}
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}
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Bitu vga_read_p3d5(Bitu port,Bitu iolen) {
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// LOG_MSG("VGA CRCT read from reg %X",crtc(index));
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switch(crtc(index)) {
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case 0x00: /* Horizontal Total Register */
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return crtc(horizontal_total);
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case 0x01: /* Horizontal Display End Register */
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return crtc(horizontal_display_end);
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case 0x02: /* Start Horizontal Blanking Register */
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return crtc(start_horizontal_blanking);
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case 0x03: /* End Horizontal Blanking Register */
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return crtc(end_horizontal_blanking);
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case 0x04: /* Start Horizontal Retrace Register */
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return crtc(start_horizontal_retrace);
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case 0x05: /* End Horizontal Retrace Register */
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return crtc(end_horizontal_retrace);
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case 0x06: /* Vertical Total Register */
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return crtc(vertical_total);
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case 0x07: /* Overflow Register */
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return crtc(overflow);
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case 0x08: /* Preset Row Scan Register */
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return crtc(preset_row_scan);
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case 0x09: /* Maximum Scan Line Register */
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return crtc(maximum_scan_line);
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case 0x0A: /* Cursor Start Register */
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return crtc(cursor_start);
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case 0x0B: /* Cursor End Register */
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return crtc(cursor_end);
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case 0x0C: /* Start Address High Register */
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return crtc(start_address_high);
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case 0x0D: /* Start Address Low Register */
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return crtc(start_address_low);
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case 0x0E: /*Cursor Location High Register */
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return crtc(cursor_location_high);
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case 0x0F: /* Cursor Location Low Register */
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return crtc(cursor_location_low);
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case 0x10: /* Vertical Retrace Start Register */
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return crtc(vertical_retrace_start);
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case 0x11: /* Vertical Retrace End Register */
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return crtc(vertical_retrace_end);
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case 0x12: /* Vertical Display End Register */
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return crtc(vertical_display_end);
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case 0x13: /* Offset register */
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return crtc(offset);
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case 0x14: /* Underline Location Register */
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return crtc(underline_location);
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case 0x15: /* Start Vertical Blank Register */
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return crtc(start_vertical_blanking);
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case 0x16: /* End Vertical Blank Register */
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return crtc(end_vertical_blanking);
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case 0x17: /* Mode Control Register */
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return crtc(mode_control);
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case 0x18: /* Line Compare Register */
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|
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return crtc(line_compare);
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default:
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|
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if (svga.read_p3d5) {
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return svga.read_p3d5(crtc(index), iolen);
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} else {
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LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:CRTC:Read from unknown index %X",crtc(index));
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return 0x0;
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}
|
|
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}
|
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}
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