2009-05-02 23:03:37 +02:00
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/*
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2009-05-03 00:28:34 +02:00
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* Copyright (C) 2002-2007 The DOSBox Team
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2009-05-02 23:03:37 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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2009-05-03 00:02:15 +02:00
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* GNU General Public License for more details.
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2009-05-02 23:03:37 +02:00
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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2009-05-03 00:37:32 +02:00
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/* $Id: timer.cpp,v 1.44 2007/06/12 20:22:08 c2woody Exp $ */
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2009-05-02 23:03:37 +02:00
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2009-05-03 00:18:08 +02:00
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#include <math.h>
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2009-05-02 23:03:37 +02:00
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#include "dosbox.h"
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#include "inout.h"
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#include "pic.h"
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#include "mem.h"
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#include "mixer.h"
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#include "timer.h"
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2009-05-03 00:18:08 +02:00
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#include "setup.h"
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2009-05-03 00:02:15 +02:00
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static INLINE void BIN2BCD(Bit16u& val) {
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Bit16u temp=val%10 + (((val/10)%10)<<4)+ (((val/100)%10)<<8) + (((val/1000)%10)<<12);
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val=temp;
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}
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static INLINE void BCD2BIN(Bit16u& val) {
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Bit16u temp= (val&0x0f) +((val>>4)&0x0f) *10 +((val>>8)&0x0f) *100 +((val>>12)&0x0f) *1000;
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val=temp;
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}
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2009-05-02 23:03:37 +02:00
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struct PIT_Block {
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2009-05-02 23:27:47 +02:00
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Bitu cntr;
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2009-05-03 00:02:15 +02:00
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float delay;
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double start;
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Bit16u read_latch;
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Bit16u write_latch;
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Bit8u mode;
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2009-05-02 23:03:37 +02:00
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Bit8u latch_mode;
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Bit8u read_state;
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Bit8u write_state;
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2009-05-03 00:02:15 +02:00
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bool bcd;
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bool go_read_latch;
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bool new_mode;
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2009-05-03 00:28:34 +02:00
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bool counterstatus_set;
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2009-05-02 23:03:37 +02:00
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};
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static PIT_Block pit[3];
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2009-05-03 00:37:32 +02:00
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static bool gate2;
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2009-05-02 23:03:37 +02:00
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2009-05-03 00:28:34 +02:00
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static Bit8u latched_timerstatus;
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// the timer status can not be overwritten until it is read or the timer was
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// reprogrammed.
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static bool latched_timerstatus_locked;
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static void PIT0_Event(Bitu /*val*/) {
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2009-05-02 23:27:47 +02:00
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PIC_ActivateIRQ(0);
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2009-05-03 00:28:34 +02:00
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if (pit[0].mode != 0) {
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pit[0].start += pit[0].delay;
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double error = pit[0].start - PIC_FullIndex();
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2009-05-03 00:37:32 +02:00
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PIC_AddEvent(PIT0_Event,(float)(pit[0].delay + error));
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2009-05-03 00:28:34 +02:00
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}
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2009-05-03 00:02:15 +02:00
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}
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static bool counter_output(Bitu counter) {
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PIT_Block * p=&pit[counter];
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double index=PIC_FullIndex()-p->start;
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switch (p->mode) {
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case 0:
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if (p->new_mode) return false;
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if (index>p->delay) return true;
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else return false;
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break;
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case 2:
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if (p->new_mode) return true;
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index=fmod(index,(double)p->delay);
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return index>0;
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case 3:
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if (p->new_mode) return true;
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index=fmod(index,(double)p->delay);
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return index*2<p->delay;
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default:
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LOG(LOG_PIT,LOG_ERROR)("Illegal Mode %d for reading output",p->mode);
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return true;
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}
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2009-05-02 23:27:47 +02:00
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}
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2009-05-03 00:28:34 +02:00
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static void status_latch(Bitu counter) {
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// the timer status can not be overwritten until it is read or the timer was
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// reprogrammed.
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if(!latched_timerstatus_locked) {
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PIT_Block * p=&pit[counter];
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latched_timerstatus=0;
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// Timer Status Word
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// 0: BCD
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// 1-3: Timer mode
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// 4-5: read/load mode
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// 6: "NULL" - this is 0 if "the counter value is in the counter" ;)
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// should rarely be 1 (i.e. on exotic modes)
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// 7: OUT - the logic level on the Timer output pin
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if(p->bcd)latched_timerstatus|=0x1;
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latched_timerstatus|=((p->mode&7)<<1);
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if((p->read_state==0)||(p->read_state==3)) latched_timerstatus|=0x30;
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else if(p->read_state==1) latched_timerstatus|=0x10;
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else if(p->read_state==2) latched_timerstatus|=0x20;
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if(counter_output(counter)) latched_timerstatus|=0x80;
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if(p->new_mode) latched_timerstatus|=0x40;
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// The first thing that is being read from this counter now is the
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// counter status.
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p->counterstatus_set=true;
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latched_timerstatus_locked=true;
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}
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}
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2009-05-02 23:03:37 +02:00
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static void counter_latch(Bitu counter) {
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/* Fill the read_latch of the selected counter with current count */
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PIT_Block * p=&pit[counter];
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2009-05-03 00:02:15 +02:00
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p->go_read_latch=false;
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2009-05-03 00:37:32 +02:00
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//If gate2 is disabled don't update the read_latch
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if(counter == 2 && !gate2) return;
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2009-05-03 00:02:15 +02:00
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double index=PIC_FullIndex()-p->start;
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2009-05-02 23:03:37 +02:00
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switch (p->mode) {
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2009-05-03 00:02:15 +02:00
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case 4: /* Software Triggered Strobe */
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2009-05-02 23:35:44 +02:00
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case 0: /* Interrupt on Terminal Count */
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/* Counter keeps on counting after passing terminal count */
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2009-05-03 00:02:15 +02:00
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if (index>p->delay) {
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index-=p->delay;
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2009-05-03 00:28:34 +02:00
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if(p->bcd) {
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index = fmod(index,(1000.0/PIT_TICK_RATE)*10000.0);
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p->read_latch = (Bit16u)(9999-index*(PIT_TICK_RATE/1000.0));
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} else {
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index = fmod(index,(1000.0/PIT_TICK_RATE)*(double)0x10000);
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p->read_latch = (Bit16u)(0xffff-index*(PIT_TICK_RATE/1000.0));
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}
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2009-05-02 23:35:44 +02:00
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} else {
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2009-05-03 00:02:15 +02:00
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p->read_latch=(Bit16u)(p->cntr-index*(PIT_TICK_RATE/1000.0));
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2009-05-02 23:35:44 +02:00
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}
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2009-05-02 23:27:47 +02:00
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break;
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2009-05-02 23:35:44 +02:00
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case 2: /* Rate Generator */
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2009-05-03 00:02:15 +02:00
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index=fmod(index,(double)p->delay);
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p->read_latch=(Bit16u)(p->cntr - (index/p->delay)*p->cntr);
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2009-05-02 23:27:47 +02:00
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break;
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2009-05-02 23:35:44 +02:00
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case 3: /* Square Wave Rate Generator */
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2009-05-03 00:02:15 +02:00
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index=fmod(index,(double)p->delay);
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index*=2;
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if (index>p->delay) index-=p->delay;
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p->read_latch=(Bit16u)(p->cntr - (index/p->delay)*p->cntr);
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2009-05-03 00:28:34 +02:00
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// In mode 3 it never returns odd numbers LSB (if odd number is written 1 will be
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// subtracted on first clock and then always 2)
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// fixes "Corncob 3D"
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p->read_latch&=0xfffe;
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2009-05-02 23:03:37 +02:00
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break;
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default:
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2009-05-02 23:43:00 +02:00
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LOG(LOG_PIT,LOG_ERROR)("Illegal Mode %d for reading counter %d",p->mode,counter);
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2009-05-03 00:02:15 +02:00
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p->read_latch=0xffff;
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2009-05-02 23:03:37 +02:00
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break;
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}
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}
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2009-05-03 00:28:34 +02:00
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static void write_latch(Bitu port,Bitu val,Bitu /*iolen*/) {
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2009-05-03 00:18:08 +02:00
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//LOG(LOG_PIT,LOG_ERROR)("port %X write:%X state:%X",port,val,pit[port-0x40].write_state);
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2009-05-02 23:27:47 +02:00
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Bitu counter=port-0x40;
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2009-05-02 23:03:37 +02:00
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PIT_Block * p=&pit[counter];
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2009-05-03 00:02:15 +02:00
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if(p->bcd == true) BIN2BCD(p->write_latch);
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2009-05-02 23:03:37 +02:00
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switch (p->write_state) {
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case 0:
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p->write_latch = p->write_latch | ((val & 0xff) << 8);
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p->write_state = 3;
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break;
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case 3:
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p->write_latch = val & 0xff;
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p->write_state = 0;
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break;
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case 1:
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p->write_latch = val & 0xff;
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break;
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case 2:
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p->write_latch = (val & 0xff) << 8;
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break;
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2009-05-03 00:02:15 +02:00
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}
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if (p->bcd==true) BCD2BIN(p->write_latch);
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if (p->write_state != 0) {
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if (p->write_latch == 0) {
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if (p->bcd == false) p->cntr = 0x10000;
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else p->cntr=9999;
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} else p->cntr = p->write_latch;
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p->start=PIC_FullIndex();
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p->delay=(1000.0f/((float)PIT_TICK_RATE/(float)p->cntr));
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2009-05-02 23:03:37 +02:00
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switch (counter) {
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case 0x00: /* Timer hooked to IRQ 0 */
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2009-05-03 00:08:43 +02:00
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if (p->new_mode || p->mode == 0 ) {
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2009-05-03 00:37:32 +02:00
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if(p->mode==0) PIC_RemoveEvents(PIT0_Event); // DoWhackaDo demo
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2009-05-03 00:02:15 +02:00
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PIC_AddEvent(PIT0_Event,p->delay);
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} else LOG(LOG_PIT,LOG_NORMAL)("PIT 0 Timer set without new control word");
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LOG(LOG_PIT,LOG_NORMAL)("PIT 0 Timer at %.2f Hz mode %d",1000.0/p->delay,p->mode);
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2009-05-02 23:03:37 +02:00
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break;
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case 0x02: /* Timer hooked to PC-Speaker */
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2009-05-02 23:35:44 +02:00
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// LOG(LOG_PIT,"PIT 2 Timer at %.3g Hz mode %d",PIT_TICK_RATE/(double)p->cntr,p->mode);
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2009-05-02 23:20:05 +02:00
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PCSPEAKER_SetCounter(p->cntr,p->mode);
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2009-05-02 23:03:37 +02:00
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break;
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default:
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2009-05-02 23:43:00 +02:00
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LOG(LOG_PIT,LOG_ERROR)("PIT:Illegal timer selected for writing");
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2009-05-02 23:03:37 +02:00
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}
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2009-05-03 00:28:34 +02:00
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p->new_mode=false;
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2009-05-02 23:03:37 +02:00
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}
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}
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2009-05-03 00:28:34 +02:00
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static Bitu read_latch(Bitu port,Bitu /*iolen*/) {
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2009-05-03 00:18:08 +02:00
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//LOG(LOG_PIT,LOG_ERROR)("port read %X",port);
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2009-05-02 23:03:37 +02:00
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Bit32u counter=port-0x40;
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2009-05-03 00:28:34 +02:00
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Bit8u ret=0;
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if(GCC_UNLIKELY(pit[counter].counterstatus_set)){
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pit[counter].counterstatus_set = false;
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latched_timerstatus_locked = false;
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ret = latched_timerstatus;
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} else {
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if (pit[counter].go_read_latch == true)
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counter_latch(counter);
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if( pit[counter].bcd == true) BIN2BCD(pit[counter].read_latch);
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switch (pit[counter].read_state) {
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case 0: /* read MSB & return to state 3 */
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ret=(pit[counter].read_latch >> 8) & 0xff;
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pit[counter].read_state = 3;
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pit[counter].go_read_latch = true;
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break;
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case 3: /* read LSB followed by MSB */
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ret = pit[counter].read_latch & 0xff;
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if (pit[counter].mode & 0x80) pit[counter].mode &= 7;
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else pit[counter].read_state = 0;
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break;
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case 1: /* read LSB */
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ret = pit[counter].read_latch & 0xff;
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pit[counter].go_read_latch = true;
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break;
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case 2: /* read MSB */
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ret = (pit[counter].read_latch >> 8) & 0xff;
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pit[counter].go_read_latch = true;
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break;
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default:
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E_Exit("Timer.cpp: error in readlatch");
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break;
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}
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if( pit[counter].bcd == true) BCD2BIN(pit[counter].read_latch);
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2009-05-03 00:02:15 +02:00
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}
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return ret;
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2009-05-02 23:03:37 +02:00
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}
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2009-05-03 00:28:34 +02:00
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static void write_p43(Bitu /*port*/,Bitu val,Bitu /*iolen*/) {
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2009-05-03 00:18:08 +02:00
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//LOG(LOG_PIT,LOG_ERROR)("port 43 %X",val);
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2009-05-02 23:03:37 +02:00
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Bitu latch=(val >> 6) & 0x03;
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switch (latch) {
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case 0:
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case 1:
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case 2:
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if ((val & 0x30) == 0) {
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/* Counter latch command */
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counter_latch(latch);
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} else {
|
2009-05-03 00:37:32 +02:00
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pit[latch].bcd = (val&1)>0;
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if (val & 1) {
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if(pit[latch].cntr>=9999) pit[latch].cntr=9999;
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}
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2009-05-03 00:28:34 +02:00
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// Timer is being reprogrammed, unlock the status
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if(pit[latch].counterstatus_set) {
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pit[latch].counterstatus_set=false;
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latched_timerstatus_locked=false;
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}
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2009-05-02 23:03:37 +02:00
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pit[latch].read_state = (val >> 4) & 0x03;
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pit[latch].write_state = (val >> 4) & 0x03;
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2009-05-03 00:18:08 +02:00
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Bit8u mode = (val >> 1) & 0x07;
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if (mode > 5)
|
|
|
|
mode -= 4; //6,7 become 2 and 3
|
|
|
|
|
|
|
|
/* Don't set it directly so counter_output uses the old mode */
|
|
|
|
/* That's theory. It breaks panic. So set it here again */
|
|
|
|
if(!pit[latch].mode) pit[latch].mode = mode;
|
|
|
|
|
|
|
|
/* If the line goes from low to up => generate irq.
|
|
|
|
* ( BUT needs to stay up until acknowlegded by the cpu!!! therefore: )
|
|
|
|
* If the line goes to low => disable irq.
|
|
|
|
* Mode 0 starts with a low line. (so always disable irq)
|
|
|
|
* Mode 2,3 start with a high line.
|
|
|
|
* counter_output tells if the current counter is high or low
|
|
|
|
* So actually a mode 2 timer enables and disables irq al the time. (not handled) */
|
|
|
|
|
|
|
|
if (latch == 0) {
|
2009-05-03 00:02:15 +02:00
|
|
|
PIC_RemoveEvents(PIT0_Event);
|
2009-05-03 00:28:34 +02:00
|
|
|
if (!counter_output(0) && mode) {
|
2009-05-03 00:02:15 +02:00
|
|
|
PIC_ActivateIRQ(0);
|
2009-05-03 00:28:34 +02:00
|
|
|
//Don't raise instantaniously. (Origamo)
|
|
|
|
if(CPU_Cycles < 25) CPU_Cycles = 25;
|
|
|
|
}
|
2009-05-03 00:18:08 +02:00
|
|
|
if(!mode)
|
|
|
|
PIC_DeActivateIRQ(0);
|
2009-05-03 00:02:15 +02:00
|
|
|
}
|
2009-05-03 00:18:08 +02:00
|
|
|
pit[latch].new_mode = true;
|
|
|
|
pit[latch].mode = mode; //Set the correct mode (here)
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3:
|
2009-05-02 23:35:44 +02:00
|
|
|
if ((val & 0x20)==0) { /* Latch multiple pit counters */
|
|
|
|
if (val & 0x02) counter_latch(0);
|
|
|
|
if (val & 0x04) counter_latch(1);
|
|
|
|
if (val & 0x08) counter_latch(2);
|
2009-05-03 00:28:34 +02:00
|
|
|
}
|
|
|
|
// status and values can be latched simultaneously
|
|
|
|
if ((val & 0x10)==0) { /* Latch status words */
|
|
|
|
// but only 1 status can be latched simultaneously
|
|
|
|
if (val & 0x02) status_latch(0);
|
|
|
|
else if (val & 0x04) status_latch(1);
|
|
|
|
else if (val & 0x08) status_latch(2);
|
|
|
|
}
|
2009-05-02 23:35:44 +02:00
|
|
|
break;
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-05-03 00:37:32 +02:00
|
|
|
void TIMER_SetGate2(bool in) {
|
|
|
|
//No changes if gate doesn't change
|
|
|
|
if(gate2 == in) return;
|
|
|
|
Bit8u & mode=pit[2].mode;
|
|
|
|
switch(mode) {
|
|
|
|
case 0:
|
|
|
|
if(in) pit[2].start = PIC_FullIndex();
|
|
|
|
else {
|
|
|
|
//Fill readlatch and store it.
|
|
|
|
counter_latch(2);
|
|
|
|
pit[2].cntr = pit[2].read_latch;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
case 3:
|
|
|
|
//If gate is enabled restart counting. If disable store the current read_latch
|
|
|
|
if(in) pit[2].start = PIC_FullIndex();
|
|
|
|
else counter_latch(2);
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
case 4:
|
|
|
|
case 5:
|
|
|
|
LOG(LOG_MISC,LOG_WARN)("unsupported gate 2 mode %x",mode);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
gate2 = in; //Set it here so the counter_latch above works
|
|
|
|
}
|
2009-05-02 23:03:37 +02:00
|
|
|
|
2009-05-03 00:18:08 +02:00
|
|
|
class TIMER:public Module_base{
|
|
|
|
private:
|
|
|
|
IO_ReadHandleObject ReadHandler[4];
|
|
|
|
IO_WriteHandleObject WriteHandler[4];
|
|
|
|
public:
|
|
|
|
TIMER(Section* configuration):Module_base(configuration){
|
|
|
|
WriteHandler[0].Install(0x40,write_latch,IO_MB);
|
|
|
|
// WriteHandler[1].Install(0x41,write_latch,IO_MB);
|
|
|
|
WriteHandler[2].Install(0x42,write_latch,IO_MB);
|
|
|
|
WriteHandler[3].Install(0x43,write_p43,IO_MB);
|
|
|
|
ReadHandler[0].Install(0x40,read_latch,IO_MB);
|
|
|
|
ReadHandler[1].Install(0x41,read_latch,IO_MB);
|
|
|
|
ReadHandler[2].Install(0x42,read_latch,IO_MB);
|
|
|
|
/* Setup Timer 0 */
|
|
|
|
pit[0].cntr=0x10000;
|
|
|
|
pit[0].write_state = 3;
|
|
|
|
pit[0].read_state = 3;
|
|
|
|
pit[0].read_latch=0;
|
|
|
|
pit[0].write_latch=0;
|
|
|
|
pit[0].mode=3;
|
|
|
|
pit[0].bcd = false;
|
|
|
|
pit[0].go_read_latch = true;
|
2009-05-03 00:28:34 +02:00
|
|
|
pit[0].counterstatus_set = false;
|
2009-05-03 00:18:08 +02:00
|
|
|
|
|
|
|
pit[1].bcd = false;
|
|
|
|
pit[1].write_state = 1;
|
|
|
|
pit[1].read_state = 1;
|
|
|
|
pit[1].go_read_latch = true;
|
|
|
|
pit[1].cntr = 18;
|
|
|
|
pit[1].mode = 2;
|
2009-05-03 00:28:34 +02:00
|
|
|
pit[1].write_state = 3;
|
|
|
|
pit[1].counterstatus_set = false;
|
2009-05-03 00:18:08 +02:00
|
|
|
|
|
|
|
pit[2].read_latch=0; /* MadTv1 */
|
|
|
|
pit[2].write_state = 3; /* Chuck Yeager */
|
|
|
|
pit[2].read_state = 3;
|
|
|
|
pit[2].mode=3;
|
|
|
|
pit[2].bcd=false;
|
|
|
|
pit[2].cntr=1320;
|
|
|
|
pit[2].go_read_latch=true;
|
2009-05-03 00:28:34 +02:00
|
|
|
pit[2].counterstatus_set = false;
|
2009-05-03 00:18:08 +02:00
|
|
|
|
|
|
|
pit[0].delay=(1000.0f/((float)PIT_TICK_RATE/(float)pit[0].cntr));
|
|
|
|
pit[1].delay=(1000.0f/((float)PIT_TICK_RATE/(float)pit[1].cntr));
|
|
|
|
pit[2].delay=(1000.0f/((float)PIT_TICK_RATE/(float)pit[2].cntr));
|
2009-05-03 00:28:34 +02:00
|
|
|
|
|
|
|
latched_timerstatus_locked=false;
|
2009-05-03 00:37:32 +02:00
|
|
|
gate2 = true;
|
2009-05-03 00:18:08 +02:00
|
|
|
PIC_AddEvent(PIT0_Event,pit[0].delay);
|
|
|
|
}
|
|
|
|
~TIMER(){
|
|
|
|
PIC_RemoveEvents(PIT0_Event);
|
|
|
|
}
|
|
|
|
};
|
|
|
|
static TIMER* test;
|
2009-05-02 23:43:00 +02:00
|
|
|
|
2009-05-03 00:28:34 +02:00
|
|
|
void TIMER_Destroy(Section*){
|
2009-05-03 00:18:08 +02:00
|
|
|
delete test;
|
|
|
|
}
|
|
|
|
void TIMER_Init(Section* sec) {
|
|
|
|
test = new TIMER(sec);
|
|
|
|
sec->AddDestroyFunction(&TIMER_Destroy);
|
2009-05-02 23:03:37 +02:00
|
|
|
}
|