2009-05-03 01:02:35 +02:00
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/*
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* Copyright (C) 2002-2009 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: callback.cpp,v 1.40 2009/03/03 18:30:41 c2woody Exp $ */
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#include <stdlib.h>
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#include <string.h>
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#include "dosbox.h"
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#include "callback.h"
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#include "mem.h"
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#include "cpu.h"
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/* CallBack are located at 0xF100:0 (see CB_SEG in callback.h)
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And they are 16 bytes each and you can define them to behave in certain ways like a
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far return or and IRET
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*/
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CallBack_Handler CallBack_Handlers[CB_MAX];
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char* CallBack_Description[CB_MAX];
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static Bitu call_stop,call_idle,call_default,call_default2;
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Bitu call_priv_io;
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static Bitu illegal_handler(void) {
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E_Exit("Illegal CallBack Called");
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return 1;
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}
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Bitu CALLBACK_Allocate(void) {
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for (Bitu i=1;(i<CB_MAX);i++) {
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if (CallBack_Handlers[i]==&illegal_handler) {
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CallBack_Handlers[i]=0;
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return i;
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}
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}
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E_Exit("CALLBACK:Can't allocate handler.");
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return 0;
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}
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void CALLBACK_DeAllocate(Bitu in) {
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CallBack_Handlers[in]=&illegal_handler;
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}
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void CALLBACK_Idle(void) {
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/* this makes the cpu execute instructions to handle irq's and then come back */
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Bitu oldIF=GETFLAG(IF);
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SETFLAGBIT(IF,true);
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Bit16u oldcs=SegValue(cs);
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Bit32u oldeip=reg_eip;
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SegSet16(cs,CB_SEG);
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reg_eip=call_idle*CB_SIZE;
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DOSBOX_RunMachine();
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reg_eip=oldeip;
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SegSet16(cs,oldcs);
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SETFLAGBIT(IF,oldIF);
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if (!CPU_CycleAutoAdjust && CPU_Cycles>0)
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CPU_Cycles=0;
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}
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static Bitu default_handler(void) {
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LOG(LOG_CPU,LOG_ERROR)("Illegal Unhandled Interrupt Called %X",lastint);
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return CBRET_NONE;
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}
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static Bitu stop_handler(void) {
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return CBRET_STOP;
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}
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void CALLBACK_RunRealFar(Bit16u seg,Bit16u off) {
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reg_sp-=4;
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mem_writew(SegPhys(ss)+reg_sp,call_stop*CB_SIZE);
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mem_writew(SegPhys(ss)+reg_sp+2,CB_SEG);
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Bit32u oldeip=reg_eip;
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Bit16u oldcs=SegValue(cs);
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reg_eip=off;
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SegSet16(cs,seg);
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DOSBOX_RunMachine();
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reg_eip=oldeip;
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SegSet16(cs,oldcs);
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}
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void CALLBACK_RunRealInt(Bit8u intnum) {
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Bit32u oldeip=reg_eip;
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Bit16u oldcs=SegValue(cs);
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reg_eip=(CB_MAX*CB_SIZE)+(intnum*6);
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SegSet16(cs,CB_SEG);
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DOSBOX_RunMachine();
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reg_eip=oldeip;
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SegSet16(cs,oldcs);
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}
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void CALLBACK_SZF(bool val) {
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Bit16u tempf=mem_readw(SegPhys(ss)+reg_sp+4) & 0xFFBF;
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Bit16u newZF=(val==true) << 6;
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mem_writew(SegPhys(ss)+reg_sp+4,(tempf | newZF));
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}
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void CALLBACK_SCF(bool val) {
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Bit16u tempf=mem_readw(SegPhys(ss)+reg_sp+4) & 0xFFFE;
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Bit16u newCF=(val==true);
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mem_writew(SegPhys(ss)+reg_sp+4,(tempf | newCF));
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}
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void CALLBACK_SetDescription(Bitu nr, const char* descr) {
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if (descr) {
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CallBack_Description[nr] = new char[strlen(descr)+1];
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strcpy(CallBack_Description[nr],descr);
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} else
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CallBack_Description[nr] = 0;
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}
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const char* CALLBACK_GetDescription(Bitu nr) {
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if (nr>=CB_MAX) return 0;
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return CallBack_Description[nr];
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}
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Bitu CALLBACK_SetupExtra(Bitu callback, Bitu type, PhysPt physAddress, bool use_cb=true) {
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if (callback>=CB_MAX)
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return 0;
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switch (type) {
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case CB_RETN:
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xC3); //A RETN Instruction
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return (use_cb?5:1);
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case CB_RETF:
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xCB); //A RETF Instruction
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return (use_cb?5:1);
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case CB_RETF8:
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xCA); //A RETF 8 Instruction
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phys_writew(physAddress+0x01,(Bit16u)0x0008);
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return (use_cb?7:3);
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case CB_IRET:
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0xCF); //An IRET Instruction
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return (use_cb?5:1);
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case CB_IRETD:
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x66); //An IRETD Instruction
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phys_writeb(physAddress+0x01,(Bit8u)0xCF);
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return (use_cb?6:2);
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case CB_IRET_STI:
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phys_writeb(physAddress+0x00,(Bit8u)0xFB); //STI
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if (use_cb) {
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phys_writeb(physAddress+0x01,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x02,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x03, callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x01,(Bit8u)0xCF); //An IRET Instruction
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return (use_cb?6:2);
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case CB_IRET_EOI_PIC1:
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writeb(physAddress+0x01,(Bit8u)0xb0); // mov al, 0x20
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phys_writeb(physAddress+0x02,(Bit8u)0x20);
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phys_writeb(physAddress+0x03,(Bit8u)0xe6); // out 0x20, al
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phys_writeb(physAddress+0x04,(Bit8u)0x20);
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phys_writeb(physAddress+0x05,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x06,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x0b:0x07);
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case CB_IRQ0: // timer int8
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writeb(physAddress+0x01,(Bit8u)0x52); // push dx
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phys_writeb(physAddress+0x02,(Bit8u)0x1e); // push ds
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phys_writew(physAddress+0x03,(Bit16u)0x1ccd); // int 1c
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phys_writeb(physAddress+0x05,(Bit8u)0xfa); // cli
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phys_writeb(physAddress+0x06,(Bit8u)0x1f); // pop ds
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phys_writeb(physAddress+0x07,(Bit8u)0x5a); // pop dx
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phys_writew(physAddress+0x08,(Bit16u)0x20b0); // mov al, 0x20
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phys_writew(physAddress+0x0a,(Bit16u)0x20e6); // out 0x20, al
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phys_writeb(physAddress+0x0c,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x0d,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x12:0x0e);
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case CB_IRQ1: // keyboard int9
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writew(physAddress+0x01,(Bit16u)0x60e4); // in al, 0x60
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phys_writew(physAddress+0x03,(Bit16u)0x4fb4); // mov ah, 0x4f
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phys_writeb(physAddress+0x05,(Bit8u)0xf9); // stc
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phys_writew(physAddress+0x06,(Bit16u)0x15cd); // int 15
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if (use_cb) {
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phys_writew(physAddress+0x08,(Bit16u)0x0473); // jc skip
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phys_writeb(physAddress+0x0a,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x0b,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x0c,callback); //The immediate word
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// jump here to (skip):
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physAddress+=6;
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}
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phys_writeb(physAddress+0x08,(Bit8u)0xfa); // cli
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phys_writew(physAddress+0x09,(Bit16u)0x20b0); // mov al, 0x20
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phys_writew(physAddress+0x0b,(Bit16u)0x20e6); // out 0x20, al
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phys_writeb(physAddress+0x0d,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x0e,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x15:0x0f);
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case CB_IRQ9: // pic cascade interrupt
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if (use_cb) {
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phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x02,callback); //The immediate word
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physAddress+=4;
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}
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phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
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phys_writew(physAddress+0x01,(Bit16u)0x61b0); // mov al, 0x61
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phys_writew(physAddress+0x03,(Bit16u)0xa0e6); // out 0xa0, al
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phys_writew(physAddress+0x05,(Bit16u)0x0acd); // int a
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phys_writeb(physAddress+0x07,(Bit8u)0xfa); // cli
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phys_writeb(physAddress+0x08,(Bit8u)0x58); // pop ax
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phys_writeb(physAddress+0x09,(Bit8u)0xcf); //An IRET Instruction
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return (use_cb?0x0e:0x0a);
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case CB_IRQ12: // ps2 mouse int74
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if (!use_cb) E_Exit("int74 callback must implement a callback handler!");
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phys_writeb(physAddress+0x00,(Bit8u)0x1e); // push ds
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phys_writeb(physAddress+0x01,(Bit8u)0x06); // push es
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phys_writew(physAddress+0x02,(Bit16u)0x6066); // pushad
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phys_writeb(physAddress+0x04,(Bit8u)0xfc); // cld
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phys_writeb(physAddress+0x05,(Bit8u)0xfb); // sti
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phys_writeb(physAddress+0x06,(Bit8u)0xFE); //GRP 4
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phys_writeb(physAddress+0x07,(Bit8u)0x38); //Extra Callback instruction
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phys_writew(physAddress+0x08,callback); //The immediate word
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|
return 0x0a;
|
|
|
|
|
case CB_IRQ12_RET: // ps2 mouse int74 return
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x02,callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
}
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xfa); // cli
|
|
|
|
|
phys_writew(physAddress+0x01,(Bit16u)0x20b0); // mov al, 0x20
|
|
|
|
|
phys_writew(physAddress+0x03,(Bit16u)0xa0e6); // out 0xa0, al
|
|
|
|
|
phys_writew(physAddress+0x05,(Bit16u)0x20e6); // out 0x20, al
|
|
|
|
|
phys_writew(physAddress+0x07,(Bit16u)0x6166); // popad
|
|
|
|
|
phys_writeb(physAddress+0x09,(Bit8u)0x07); // pop es
|
|
|
|
|
phys_writeb(physAddress+0x0a,(Bit8u)0x1f); // pop ds
|
|
|
|
|
phys_writeb(physAddress+0x0b,(Bit8u)0xcf); //An IRET Instruction
|
|
|
|
|
return (use_cb?0x10:0x0c);
|
|
|
|
|
case CB_IRQ6_PCJR: // pcjr keyboard interrupt
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
|
|
|
|
|
phys_writew(physAddress+0x01,(Bit16u)0x60e4); // in al, 0x60
|
|
|
|
|
phys_writew(physAddress+0x03,(Bit16u)0xe03c); // cmp al, 0xe0
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writew(physAddress+0x05,(Bit16u)0x0674); // je skip
|
|
|
|
|
phys_writeb(physAddress+0x07,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x08,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x09,callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
} else {
|
|
|
|
|
phys_writew(physAddress+0x05,(Bit16u)0x0274); // je skip
|
|
|
|
|
}
|
|
|
|
|
phys_writew(physAddress+0x07,(Bit16u)0x09cd); // int 9
|
|
|
|
|
// jump here to (skip):
|
|
|
|
|
phys_writeb(physAddress+0x09,(Bit8u)0xfa); // cli
|
|
|
|
|
phys_writew(physAddress+0x0a,(Bit16u)0x20b0); // mov al, 0x20
|
|
|
|
|
phys_writew(physAddress+0x0c,(Bit16u)0x20e6); // out 0x20, al
|
|
|
|
|
phys_writeb(physAddress+0x0e,(Bit8u)0x58); // pop ax
|
|
|
|
|
phys_writeb(physAddress+0x0f,(Bit8u)0xcf); //An IRET Instruction
|
|
|
|
|
return (use_cb?0x14:0x10);
|
|
|
|
|
case CB_MOUSE:
|
|
|
|
|
phys_writew(physAddress+0x00,(Bit16u)0x07eb); // jmp i33hd
|
|
|
|
|
physAddress+=9;
|
|
|
|
|
// jump here to (i33hd):
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x02,callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
}
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xCF); //An IRET Instruction
|
|
|
|
|
return (use_cb?0x0e:0x0a);
|
|
|
|
|
case CB_INT16:
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xFB); //STI
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x02,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x03, callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
}
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0xCF); //An IRET Instruction
|
|
|
|
|
for (Bitu i=0;i<=0x0b;i++) phys_writeb(physAddress+0x02+i,0x90);
|
|
|
|
|
phys_writew(physAddress+0x0e,(Bit16u)0xedeb); //jmp callback
|
|
|
|
|
return (use_cb?0x10:0x0c);
|
|
|
|
|
case CB_INT29: // fast console output
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x02,callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
}
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
|
|
|
|
|
phys_writew(physAddress+0x01,(Bit16u)0x0eb4); // mov ah, 0x0e
|
|
|
|
|
phys_writew(physAddress+0x03,(Bit16u)0x10cd); // int 10
|
|
|
|
|
phys_writeb(physAddress+0x05,(Bit8u)0x58); // pop ax
|
|
|
|
|
phys_writeb(physAddress+0x06,(Bit8u)0xcf); //An IRET Instruction
|
|
|
|
|
return (use_cb?0x0b:0x07);
|
|
|
|
|
case CB_HOOKABLE:
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xEB); //jump near
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0x03); //offset
|
|
|
|
|
phys_writeb(physAddress+0x02,(Bit8u)0x90); //NOP
|
|
|
|
|
phys_writeb(physAddress+0x03,(Bit8u)0x90); //NOP
|
|
|
|
|
phys_writeb(physAddress+0x04,(Bit8u)0x90); //NOP
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writeb(physAddress+0x05,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x06,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x07,callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
}
|
|
|
|
|
phys_writeb(physAddress+0x05,(Bit8u)0xCB); //A RETF Instruction
|
|
|
|
|
return (use_cb?0x0a:0x06);
|
|
|
|
|
case CB_TDE_IRET: // TandyDAC end transfer
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x02,callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
}
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0x50); // push ax
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0xb8); // mov ax, 0x91fb
|
|
|
|
|
phys_writew(physAddress+0x02,(Bit16u)0x91fb);
|
|
|
|
|
phys_writew(physAddress+0x04,(Bit16u)0x15cd); // int 15
|
|
|
|
|
phys_writeb(physAddress+0x06,(Bit8u)0xfa); // cli
|
|
|
|
|
phys_writew(physAddress+0x07,(Bit16u)0x20b0); // mov al, 0x20
|
|
|
|
|
phys_writew(physAddress+0x09,(Bit16u)0x20e6); // out 0x20, al
|
|
|
|
|
phys_writeb(physAddress+0x0b,(Bit8u)0x58); // pop ax
|
|
|
|
|
phys_writeb(physAddress+0x0c,(Bit8u)0xcf); //An IRET Instruction
|
|
|
|
|
return (use_cb?0x11:0x0d);
|
|
|
|
|
/* case CB_IPXESR: // IPX ESR
|
|
|
|
|
if (!use_cb) E_Exit("ipx esr must implement a callback handler!");
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0x1e); // push ds
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0x06); // push es
|
|
|
|
|
phys_writew(physAddress+0x02,(Bit16u)0xa00f); // push fs
|
|
|
|
|
phys_writew(physAddress+0x04,(Bit16u)0xa80f); // push gs
|
|
|
|
|
phys_writeb(physAddress+0x06,(Bit8u)0x60); // pusha
|
|
|
|
|
phys_writeb(physAddress+0x07,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x08,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x09,callback); //The immediate word
|
|
|
|
|
phys_writeb(physAddress+0x0b,(Bit8u)0xCB); //A RETF Instruction
|
|
|
|
|
return 0x0c;
|
|
|
|
|
case CB_IPXESR_RET: // IPX ESR return
|
|
|
|
|
if (use_cb) E_Exit("ipx esr return must not implement a callback handler!");
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xfa); // cli
|
|
|
|
|
phys_writew(physAddress+0x01,(Bit16u)0x20b0); // mov al, 0x20
|
|
|
|
|
phys_writew(physAddress+0x03,(Bit16u)0xa0e6); // out 0xa0, al
|
|
|
|
|
phys_writew(physAddress+0x05,(Bit16u)0x20e6); // out 0x20, al
|
|
|
|
|
phys_writeb(physAddress+0x07,(Bit8u)0x61); // popa
|
|
|
|
|
phys_writew(physAddress+0x08,(Bit16u)0xA90F); // pop gs
|
|
|
|
|
phys_writew(physAddress+0x0a,(Bit16u)0xA10F); // pop fs
|
|
|
|
|
phys_writeb(physAddress+0x0c,(Bit8u)0x07); // pop es
|
|
|
|
|
phys_writeb(physAddress+0x0d,(Bit8u)0x1f); // pop ds
|
|
|
|
|
phys_writeb(physAddress+0x0e,(Bit8u)0xcf); //An IRET Instruction
|
|
|
|
|
return 0x0f; */
|
|
|
|
|
case CB_INT21:
|
|
|
|
|
phys_writeb(physAddress+0x00,(Bit8u)0xFB); //STI
|
|
|
|
|
if (use_cb) {
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0xFE); //GRP 4
|
|
|
|
|
phys_writeb(physAddress+0x02,(Bit8u)0x38); //Extra Callback instruction
|
|
|
|
|
phys_writew(physAddress+0x03, callback); //The immediate word
|
|
|
|
|
physAddress+=4;
|
|
|
|
|
}
|
|
|
|
|
phys_writeb(physAddress+0x01,(Bit8u)0xCF); //An IRET Instruction
|
|
|
|
|
phys_writeb(physAddress+0x02,(Bit8u)0xCB); //A RETF Instruction
|
|
|
|
|
return (use_cb?7:3);
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
E_Exit("CALLBACK:Setup:Illegal type %d",type);
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool CALLBACK_Setup(Bitu callback,CallBack_Handler handler,Bitu type,const char* descr) {
|
|
|
|
|
if (callback>=CB_MAX) return false;
|
|
|
|
|
CALLBACK_SetupExtra(callback,type,CALLBACK_PhysPointer(callback)+0,(handler!=NULL));
|
|
|
|
|
CallBack_Handlers[callback]=handler;
|
|
|
|
|
CALLBACK_SetDescription(callback,descr);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
Bitu CALLBACK_Setup(Bitu callback,CallBack_Handler handler,Bitu type,PhysPt addr,const char* descr) {
|
|
|
|
|
if (callback>=CB_MAX) return 0;
|
|
|
|
|
Bitu csize=CALLBACK_SetupExtra(callback,type,addr,(handler!=NULL));
|
|
|
|
|
if (csize>0) {
|
|
|
|
|
CallBack_Handlers[callback]=handler;
|
|
|
|
|
CALLBACK_SetDescription(callback,descr);
|
|
|
|
|
}
|
|
|
|
|
return csize;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void CALLBACK_RemoveSetup(Bitu callback) {
|
|
|
|
|
for (Bitu i = 0;i < 16;i++) {
|
|
|
|
|
phys_writeb(CALLBACK_PhysPointer(callback)+i ,(Bit8u) 0x00);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
CALLBACK_HandlerObject::~CALLBACK_HandlerObject(){
|
|
|
|
|
if(!installed) return;
|
|
|
|
|
if(m_type == CALLBACK_HandlerObject::SETUP) {
|
|
|
|
|
if(vectorhandler.installed){
|
|
|
|
|
//See if we are the current handler. if so restore the old one
|
|
|
|
|
if(RealGetVec(vectorhandler.interrupt) == Get_RealPointer()) {
|
|
|
|
|
RealSetVec(vectorhandler.interrupt,vectorhandler.old_vector);
|
|
|
|
|
} else
|
|
|
|
|
LOG(LOG_MISC,LOG_WARN)("Interrupt vector changed on %X %s",vectorhandler.interrupt,CALLBACK_GetDescription(m_callback));
|
|
|
|
|
}
|
|
|
|
|
CALLBACK_RemoveSetup(m_callback);
|
|
|
|
|
} else if(m_type == CALLBACK_HandlerObject::SETUPAT){
|
|
|
|
|
E_Exit("Callback:SETUP at not handled yet.");
|
|
|
|
|
} else if(m_type == CALLBACK_HandlerObject::NONE){
|
|
|
|
|
//Do nothing. Merely DeAllocate the callback
|
|
|
|
|
} else E_Exit("what kind of callback is this!");
|
|
|
|
|
if(CallBack_Description[m_callback]) delete [] CallBack_Description[m_callback];
|
|
|
|
|
CallBack_Description[m_callback] = 0;
|
|
|
|
|
CALLBACK_DeAllocate(m_callback);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void CALLBACK_HandlerObject::Install(CallBack_Handler handler,Bitu type,const char* description){
|
|
|
|
|
if(!installed) {
|
|
|
|
|
installed=true;
|
|
|
|
|
m_type=SETUP;
|
|
|
|
|
m_callback=CALLBACK_Allocate();
|
|
|
|
|
CALLBACK_Setup(m_callback,handler,type,description);
|
|
|
|
|
} else E_Exit("Allready installed");
|
|
|
|
|
}
|
|
|
|
|
void CALLBACK_HandlerObject::Install(CallBack_Handler handler,Bitu type,PhysPt addr,const char* description){
|
|
|
|
|
if(!installed) {
|
|
|
|
|
installed=true;
|
|
|
|
|
m_type=SETUP;
|
|
|
|
|
m_callback=CALLBACK_Allocate();
|
|
|
|
|
CALLBACK_Setup(m_callback,handler,type,addr,description);
|
|
|
|
|
} else E_Exit("Allready installed");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void CALLBACK_HandlerObject::Allocate(CallBack_Handler handler,const char* description) {
|
|
|
|
|
if(!installed) {
|
|
|
|
|
installed=true;
|
|
|
|
|
m_type=NONE;
|
|
|
|
|
m_callback=CALLBACK_Allocate();
|
|
|
|
|
CALLBACK_SetDescription(m_callback,description);
|
|
|
|
|
CallBack_Handlers[m_callback]=handler;
|
|
|
|
|
} else E_Exit("Allready installed");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void CALLBACK_HandlerObject::Set_RealVec(Bit8u vec){
|
|
|
|
|
if(!vectorhandler.installed) {
|
|
|
|
|
vectorhandler.installed=true;
|
|
|
|
|
vectorhandler.interrupt=vec;
|
|
|
|
|
RealSetVec(vec,Get_RealPointer(),vectorhandler.old_vector);
|
|
|
|
|
} else E_Exit ("double usage of vector handler");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void CALLBACK_Init(Section* sec) {
|
|
|
|
|
Bitu i;
|
|
|
|
|
for (i=0;i<CB_MAX;i++) {
|
|
|
|
|
CallBack_Handlers[i]=&illegal_handler;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Setup the Stop Handler */
|
|
|
|
|
call_stop=CALLBACK_Allocate();
|
|
|
|
|
CallBack_Handlers[call_stop]=stop_handler;
|
|
|
|
|
CALLBACK_SetDescription(call_stop,"stop");
|
|
|
|
|
phys_writeb(CALLBACK_PhysPointer(call_stop)+0,0xFE);
|
|
|
|
|
phys_writeb(CALLBACK_PhysPointer(call_stop)+1,0x38);
|
|
|
|
|
phys_writew(CALLBACK_PhysPointer(call_stop)+2,call_stop);
|
|
|
|
|
|
|
|
|
|
/* Setup the idle handler */
|
|
|
|
|
call_idle=CALLBACK_Allocate();
|
|
|
|
|
CallBack_Handlers[call_idle]=stop_handler;
|
|
|
|
|
CALLBACK_SetDescription(call_idle,"idle");
|
|
|
|
|
for (i=0;i<=11;i++) phys_writeb(CALLBACK_PhysPointer(call_idle)+i,0x90);
|
|
|
|
|
phys_writeb(CALLBACK_PhysPointer(call_idle)+12,0xFE);
|
|
|
|
|
phys_writeb(CALLBACK_PhysPointer(call_idle)+13,0x38);
|
|
|
|
|
phys_writew(CALLBACK_PhysPointer(call_idle)+14,call_idle);
|
|
|
|
|
|
|
|
|
|
/* Default handlers for unhandled interrupts that have to be non-null */
|
|
|
|
|
call_default=CALLBACK_Allocate();
|
|
|
|
|
CALLBACK_Setup(call_default,&default_handler,CB_IRET,"default");
|
|
|
|
|
call_default2=CALLBACK_Allocate();
|
|
|
|
|
CALLBACK_Setup(call_default2,&default_handler,CB_IRET,"default");
|
|
|
|
|
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/* Only setup default handler for first half of interrupt table */
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for (i=0;i<0x40;i++) {
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real_writed(0,i*4,CALLBACK_RealPointer(call_default));
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}
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/* Setup block of 0xCD 0xxx instructions */
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PhysPt rint_base=(CB_SEG << 4)+CB_MAX*CB_SIZE;
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for (i=0;i<=0xff;i++) {
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phys_writeb(rint_base,0xCD);
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phys_writeb(rint_base+1,i);
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phys_writeb(rint_base+2,0xFE);
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phys_writeb(rint_base+3,0x38);
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phys_writew(rint_base+4,call_stop);
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rint_base+=6;
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}
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// setup a few interrupt handlers that point to bios IRETs by default
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real_writed(0,0x0e*4,CALLBACK_RealPointer(call_default2)); //design your own railroad
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real_writed(0,0x66*4,CALLBACK_RealPointer(call_default)); //war2d
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real_writed(0,0x67*4,CALLBACK_RealPointer(call_default));
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real_writed(0,0x68*4,CALLBACK_RealPointer(call_default));
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real_writed(0,0x5c*4,CALLBACK_RealPointer(call_default)); //Network stuff
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//real_writed(0,0xf*4,0); some games don't like it
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call_priv_io=CALLBACK_Allocate();
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// virtualizable in-out opcodes
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x00,(Bit8u)0xec); // in al, dx
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x01,(Bit8u)0xcb); // retf
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x02,(Bit8u)0xed); // in ax, dx
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x03,(Bit8u)0xcb); // retf
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x04,(Bit8u)0x66); // in eax, dx
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x05,(Bit8u)0xed);
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x06,(Bit8u)0xcb); // retf
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x08,(Bit8u)0xee); // out dx, al
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x09,(Bit8u)0xcb); // retf
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0a,(Bit8u)0xef); // out dx, ax
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0b,(Bit8u)0xcb); // retf
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0c,(Bit8u)0x66); // out dx, eax
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0d,(Bit8u)0xef);
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phys_writeb(CALLBACK_PhysPointer(call_priv_io)+0x0e,(Bit8u)0xcb); // retf
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}
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