2021-02-06 09:39:32 +01:00
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/*
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2021-02-06 16:06:31 +01:00
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* Copyright (C) 2002-2019 The DOSBox Team
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2021-02-06 09:39:32 +01:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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2021-02-06 16:06:31 +01:00
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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2021-02-06 09:39:32 +01:00
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*/
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#include "dosbox.h"
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#include "mem.h"
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#include "inout.h"
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#include "int10.h"
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static Bit8u cga_masks[4]={0x3f,0xcf,0xf3,0xfc};
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static Bit8u cga_masks2[8]={0x7f,0xbf,0xdf,0xef,0xf7,0xfb,0xfd,0xfe};
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void INT10_PutPixel(Bit16u x,Bit16u y,Bit8u page,Bit8u color) {
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static bool putpixelwarned = false;
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switch (CurMode->type) {
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case M_CGA4:
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2021-02-06 16:06:31 +01:00
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{
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if (real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE)<=5) {
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// this is a 16k mode
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Bit16u off=(y>>1)*80+(x>>2);
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if (y&1) off+=8*1024;
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2021-02-06 09:39:32 +01:00
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2021-02-06 16:06:31 +01:00
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Bit8u old=real_readb(0xb800,off);
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if (color & 0x80) {
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color&=3;
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old^=color << (2*(3-(x&3)));
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} else {
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old=(old&cga_masks[x&3])|((color&3) << (2*(3-(x&3))));
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}
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real_writeb(0xb800,off,old);
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} else {
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// a 32k mode: PCJr special case (see M_TANDY16)
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Bit16u seg;
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if (machine==MCH_PCJR) {
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Bitu cpupage =
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(real_readb(BIOSMEM_SEG, BIOSMEM_CRTCPU_PAGE) >> 3) & 0x7;
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seg = cpupage << 10; // A14-16 to addr bits 14-16
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} else
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seg = 0xb800;
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2021-02-06 09:39:32 +01:00
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2021-02-06 16:06:31 +01:00
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Bit16u off=(y>>2)*160+((x>>2)&(~1));
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off+=(8*1024) * (y & 3);
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Bit16u old=real_readw(seg,off);
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if (color & 0x80) {
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old^=(color&1) << (7-(x&7));
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old^=((color&2)>>1) << ((7-(x&7))+8);
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} else {
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old=(old&(~(0x101<<(7-(x&7))))) | ((color&1) << (7-(x&7))) | (((color&2)>>1) << ((7-(x&7))+8));
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}
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real_writew(seg,off,old);
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2021-02-06 09:39:32 +01:00
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}
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2021-02-06 16:06:31 +01:00
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}
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break;
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2021-02-06 09:39:32 +01:00
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case M_CGA2:
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{
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Bit16u off=(y>>1)*80+(x>>3);
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if (y&1) off+=8*1024;
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Bit8u old=real_readb(0xb800,off);
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if (color & 0x80) {
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color&=1;
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old^=color << ((7-(x&7)));
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} else {
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old=(old&cga_masks2[x&7])|((color&1) << ((7-(x&7))));
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}
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real_writeb(0xb800,off,old);
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}
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break;
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case M_TANDY16:
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{
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// find out if we are in a 32k mode (0x9 or 0xa)
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// This requires special handling on the PCJR
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// because only 16k are mapped at 0xB800
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bool is_32k = (real_readb(BIOSMEM_SEG, BIOSMEM_CURRENT_MODE) >= 9)?
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true:false;
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2021-02-06 09:39:32 +01:00
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2021-02-06 16:06:31 +01:00
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Bit16u segment, offset;
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if (is_32k) {
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if (machine==MCH_PCJR) {
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Bitu cpupage =
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(real_readb(BIOSMEM_SEG, BIOSMEM_CRTCPU_PAGE) >> 3) & 0x7;
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segment = cpupage << 10; // A14-16 to addr bits 14-16
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} else
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segment = 0xb800;
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// bits 1 and 0 of y select the bank
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// two pixels per byte (thus x>>1)
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offset = (y >> 2) * (CurMode->swidth >> 1) + (x>>1);
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// select the scanline bank
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offset += (8*1024) * (y & 3);
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} else {
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segment = 0xb800;
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// bit 0 of y selects the bank
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offset = (y >> 1) * (CurMode->swidth >> 1) + (x>>1);
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offset += (8*1024) * (y & 1);
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2021-02-06 09:39:32 +01:00
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}
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2021-02-06 16:06:31 +01:00
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// update the pixel
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Bit8u old=real_readb(segment, offset);
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Bit8u p[2];
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p[1] = (old >> 4) & 0xf;
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p[0] = old & 0xf;
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Bitu ind = 1-(x & 0x1);
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if (color & 0x80) {
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// color is to be XORed
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p[ind]^=(color & 0x7f);
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} else {
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p[ind]=color;
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}
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old = (p[1] << 4) | p[0];
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real_writeb(segment,offset, old);
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}
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break;
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2021-02-06 09:39:32 +01:00
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case M_LIN4:
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if ((machine!=MCH_VGA) || (svgaCard!=SVGA_TsengET4K) ||
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(CurMode->swidth>800)) {
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// the ET4000 BIOS supports text output in 800x600 SVGA (Gateway 2)
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// putpixel warining?
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break;
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}
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case M_EGA:
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{
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/* Set the correct bitmask for the pixel position */
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IO_Write(0x3ce,0x8);Bit8u mask=128>>(x&7);IO_Write(0x3cf,mask);
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/* Set the color to set/reset register */
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IO_Write(0x3ce,0x0);IO_Write(0x3cf,color);
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/* Enable all the set/resets */
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IO_Write(0x3ce,0x1);IO_Write(0x3cf,0xf);
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/* test for xorring */
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if (color & 0x80) { IO_Write(0x3ce,0x3);IO_Write(0x3cf,0x18); }
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//Perhaps also set mode 1
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/* Calculate where the pixel is in video memory */
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if (CurMode->plength!=(Bitu)real_readw(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE))
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LOG(LOG_INT10,LOG_ERROR)("PutPixel_EGA_p: %x!=%x",CurMode->plength,real_readw(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE));
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if (CurMode->swidth!=(Bitu)real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8)
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LOG(LOG_INT10,LOG_ERROR)("PutPixel_EGA_w: %x!=%x",CurMode->swidth,real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8);
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PhysPt off=0xa0000+real_readw(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE)*page+
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((y*real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8+x)>>3);
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/* Bitmask and set/reset should do the rest */
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mem_readb(off);
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mem_writeb(off,0xff);
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/* Restore bitmask */
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IO_Write(0x3ce,0x8);IO_Write(0x3cf,0xff);
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IO_Write(0x3ce,0x1);IO_Write(0x3cf,0);
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/* Restore write operating if changed */
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if (color & 0x80) { IO_Write(0x3ce,0x3);IO_Write(0x3cf,0x0); }
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break;
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}
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case M_VGA:
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mem_writeb(PhysMake(0xa000,y*320+x),color);
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break;
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case M_LIN8: {
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if (CurMode->swidth!=(Bitu)real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8)
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LOG(LOG_INT10,LOG_ERROR)("PutPixel_VGA_w: %x!=%x",CurMode->swidth,real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8);
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PhysPt off=S3_LFB_BASE+y*real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8+x;
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mem_writeb(off,color);
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break;
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}
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default:
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if(GCC_UNLIKELY(!putpixelwarned)) {
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putpixelwarned = true;
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LOG(LOG_INT10,LOG_ERROR)("PutPixel unhandled mode type %d",CurMode->type);
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}
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break;
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}
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}
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void INT10_GetPixel(Bit16u x,Bit16u y,Bit8u page,Bit8u * color) {
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switch (CurMode->type) {
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case M_CGA4:
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{
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Bit16u off=(y>>1)*80+(x>>2);
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if (y&1) off+=8*1024;
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Bit8u val=real_readb(0xb800,off);
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*color=(val>>(((3-(x&3)))*2)) & 3 ;
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}
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break;
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case M_CGA2:
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{
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Bit16u off=(y>>1)*80+(x>>3);
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if (y&1) off+=8*1024;
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Bit8u val=real_readb(0xb800,off);
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*color=(val>>(((7-(x&7))))) & 1 ;
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}
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break;
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2021-02-06 16:06:31 +01:00
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case M_TANDY16:
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{
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bool is_32k = (real_readb(BIOSMEM_SEG, BIOSMEM_CURRENT_MODE) >= 9)?true:false;
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Bit16u segment, offset;
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if (is_32k) {
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if (machine==MCH_PCJR) {
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Bitu cpupage = (real_readb(BIOSMEM_SEG, BIOSMEM_CRTCPU_PAGE) >> 3) & 0x7;
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segment = cpupage << 10;
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} else segment = 0xb800;
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offset = (y >> 2) * (CurMode->swidth >> 1) + (x>>1);
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offset += (8*1024) * (y & 3);
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} else {
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segment = 0xb800;
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offset = (y >> 1) * (CurMode->swidth >> 1) + (x>>1);
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offset += (8*1024) * (y & 1);
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}
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Bit8u val=real_readb(segment,offset);
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*color=(val>>((x&1)?0:4)) & 0xf;
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}
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break;
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2021-02-06 09:39:32 +01:00
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case M_EGA:
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{
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/* Calculate where the pixel is in video memory */
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if (CurMode->plength!=(Bitu)real_readw(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE))
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LOG(LOG_INT10,LOG_ERROR)("GetPixel_EGA_p: %x!=%x",CurMode->plength,real_readw(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE));
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if (CurMode->swidth!=(Bitu)real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8)
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LOG(LOG_INT10,LOG_ERROR)("GetPixel_EGA_w: %x!=%x",CurMode->swidth,real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8);
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PhysPt off=0xa0000+real_readw(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE)*page+
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((y*real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8+x)>>3);
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Bitu shift=7-(x & 7);
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/* Set the read map */
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*color=0;
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IO_Write(0x3ce,0x4);IO_Write(0x3cf,0);
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*color|=((mem_readb(off)>>shift) & 1) << 0;
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IO_Write(0x3ce,0x4);IO_Write(0x3cf,1);
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*color|=((mem_readb(off)>>shift) & 1) << 1;
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IO_Write(0x3ce,0x4);IO_Write(0x3cf,2);
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*color|=((mem_readb(off)>>shift) & 1) << 2;
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IO_Write(0x3ce,0x4);IO_Write(0x3cf,3);
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*color|=((mem_readb(off)>>shift) & 1) << 3;
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break;
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}
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case M_VGA:
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*color=mem_readb(PhysMake(0xa000,320*y+x));
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break;
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case M_LIN8: {
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if (CurMode->swidth!=(Bitu)real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8)
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LOG(LOG_INT10,LOG_ERROR)("GetPixel_VGA_w: %x!=%x",CurMode->swidth,real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8);
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PhysPt off=S3_LFB_BASE+y*real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS)*8+x;
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*color = mem_readb(off);
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break;
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}
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default:
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LOG(LOG_INT10,LOG_ERROR)("GetPixel unhandled mode type %d",CurMode->type);
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break;
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}
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}
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