2009-05-02 23:03:37 +02:00
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/*
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2009-05-02 23:35:44 +02:00
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* Copyright (C) 2002-2003 The DOSBox Team
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2009-05-02 23:03:37 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Library General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include "dosbox.h"
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#include "inout.h"
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#include "vga.h"
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#define seq(blah) vga.seq.blah
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Bit8u read_p3c4(Bit32u port) {
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return seq(index);
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}
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void write_p3c4(Bit32u port,Bit8u val) {
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seq(index)=val;
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};
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void write_p3c5(Bit32u port,Bit8u val) {
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switch(seq(index)) {
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case 0: /* Reset */
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seq(reset)=val;
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break;
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case 1: /* Clocking Mode */
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2009-05-02 23:27:47 +02:00
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if (val!=seq(clocking_mode)) {
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seq(clocking_mode)=val;
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VGA_StartResize();
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}
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2009-05-02 23:03:37 +02:00
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/* TODO Figure this out :)
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0 If set character clocks are 8 dots wide, else 9.
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2 If set loads video serializers every other character
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clock cycle, else every one.
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3 If set the Dot Clock is Master Clock/2, else same as Master Clock
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(See 3C2h bit 2-3). (Doubles pixels). Note: on some SVGA chipsets
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this bit also affects the Sequencer mode.
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4 If set loads video serializers every fourth character clock cycle,
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else every one.
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5 if set turns off screen and gives all memory cycles to the CPU
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interface.
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*/
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break;
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case 2: /* Map Mask */
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seq(map_mask)=val & 15;
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vga.config.full_map_mask=FillTable[val & 15];
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2009-05-02 23:12:18 +02:00
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vga.config.full_not_map_mask=~vga.config.full_map_mask;
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2009-05-02 23:03:37 +02:00
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/*
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0 Enable writes to plane 0 if set
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1 Enable writes to plane 1 if set
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2 Enable writes to plane 2 if set
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3 Enable writes to plane 3 if set
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*/
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break;
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case 3: /* Character Map Select */
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seq(character_map_select)=val;
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/*
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0,1,4 Selects VGA Character Map (0..7) if bit 3 of the character
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attribute is clear.
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2,3,5 Selects VGA Character Map (0..7) if bit 3 of the character
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attribute is set.
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Note: Character Maps are placed as follows:
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Map 0 at 0k, 1 at 16k, 2 at 32k, 3: 48k, 4: 8k, 5: 24k, 6: 40k, 7: 56k
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*/
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break;
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case 4: /* Memory Mode */
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/*
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0 Set if in an alphanumeric mode, clear in graphics modes.
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1 Set if more than 64kbytes on the adapter.
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2 Enables Odd/Even addressing mode if set. Odd/Even mode places all odd
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bytes in plane 1&3, and all even bytes in plane 0&2.
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3 If set address bit 0-1 selects video memory planes (256 color mode),
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rather than the Map Mask and Read Map Select Registers.
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*/
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seq(memory_mode)=val;
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/* Changing this means changing the VGA Memory Read/Write Handler */
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if (val&0x08) vga.config.chained=true;
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else vga.config.chained=false;
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VGA_FindSettings();
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break;
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default:
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2009-05-02 23:35:44 +02:00
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LOG(LOG_VGAMISC,"VGA:SEQ:Write to illegal index %2X",seq(index));
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2009-05-02 23:03:37 +02:00
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};
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};
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Bit8u read_p3c5(Bit32u port) {
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switch(seq(index)) {
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case 0: /* Reset */
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return seq(reset);
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break;
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case 1: /* Clocking Mode */
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return seq(clocking_mode);
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break;
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case 2: /* Map Mask */
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return seq(map_mask);
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break;
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case 3: /* Character Map Select */
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return seq(character_map_select);
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break;
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case 4: /* Memory Mode */
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return seq(memory_mode);
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default:
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2009-05-02 23:35:44 +02:00
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LOG(LOG_VGAMISC,"VGA:SEQ:Read from illegal index %2X",seq(index));
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2009-05-02 23:03:37 +02:00
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};
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return 0;
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};
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void VGA_SetupSEQ(void) {
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IO_RegisterWriteHandler(0x3c4,write_p3c4,"VGA:Sequencer Index");
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IO_RegisterWriteHandler(0x3c5,write_p3c5,"VGA:Sequencer Data");
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IO_RegisterReadHandler(0x3c4,read_p3c4,"VGA:Sequencer Index");
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IO_RegisterReadHandler(0x3c5,read_p3c5,"VGA:Sequencer Data");
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}
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