mirror of
https://github.com/retro100/dosbox-wii.git
synced 2024-06-28 23:26:09 +02:00
869 lines
22 KiB
C++
869 lines
22 KiB
C++
/*
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* Copyright (C) 2002-2019 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <math.h>
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#include <sys/types.h>
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#include "adlib.h"
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#include "setup.h"
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#include "mapper.h"
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#include "mem.h"
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#include "dbopl.h"
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#include "mame/emu.h"
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#include "mame/fmopl.h"
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#include "mame/ymf262.h"
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#define OPL2_INTERNAL_FREQ 3600000 // The OPL2 operates at 3.6MHz
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#define OPL3_INTERNAL_FREQ 14400000 // The OPL3 operates at 14.4MHz
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namespace OPL2 {
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#include "opl.cpp"
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struct Handler : public Adlib::Handler {
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virtual void WriteReg( Bit32u reg, Bit8u val ) {
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adlib_write(reg,val);
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}
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virtual Bit32u WriteAddr( Bit32u port, Bit8u val ) {
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return val;
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}
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virtual void Generate( MixerChannel* chan, Bitu samples ) {
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Bit16s buf[1024];
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while( samples > 0 ) {
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Bitu todo = samples > 1024 ? 1024 : samples;
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samples -= todo;
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adlib_getsample(buf, todo);
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chan->AddSamples_m16( todo, buf );
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}
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}
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virtual void Init( Bitu rate ) {
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adlib_init(rate);
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}
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~Handler() {
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}
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};
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}
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namespace OPL3 {
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#define OPLTYPE_IS_OPL3
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#include "opl.cpp"
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struct Handler : public Adlib::Handler {
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virtual void WriteReg( Bit32u reg, Bit8u val ) {
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adlib_write(reg,val);
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}
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virtual Bit32u WriteAddr( Bit32u port, Bit8u val ) {
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adlib_write_index(port, val);
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return opl_index;
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}
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virtual void Generate( MixerChannel* chan, Bitu samples ) {
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Bit16s buf[1024*2];
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while( samples > 0 ) {
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Bitu todo = samples > 1024 ? 1024 : samples;
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samples -= todo;
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adlib_getsample(buf, todo);
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chan->AddSamples_s16( todo, buf );
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}
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}
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virtual void Init( Bitu rate ) {
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adlib_init(rate);
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}
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~Handler() {
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}
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};
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}
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namespace MAMEOPL2 {
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struct Handler : public Adlib::Handler {
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void* chip;
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virtual void WriteReg(Bit32u reg, Bit8u val) {
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ym3812_write(chip, 0, reg);
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ym3812_write(chip, 1, val);
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}
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virtual Bit32u WriteAddr(Bit32u port, Bit8u val) {
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return val;
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}
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virtual void Generate(MixerChannel* chan, Bitu samples) {
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Bit16s buf[1024 * 2];
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while (samples > 0) {
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Bitu todo = samples > 1024 ? 1024 : samples;
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samples -= todo;
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ym3812_update_one(chip, buf, todo);
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chan->AddSamples_m16(todo, buf);
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}
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}
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virtual void Init(Bitu rate) {
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chip = ym3812_init(0, OPL2_INTERNAL_FREQ, rate);
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}
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~Handler() {
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ym3812_shutdown(chip);
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}
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};
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}
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namespace MAMEOPL3 {
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struct Handler : public Adlib::Handler {
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void* chip;
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virtual void WriteReg(Bit32u reg, Bit8u val) {
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ymf262_write(chip, 0, reg);
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ymf262_write(chip, 1, val);
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}
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virtual Bit32u WriteAddr(Bit32u port, Bit8u val) {
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return val;
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}
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virtual void Generate(MixerChannel* chan, Bitu samples) {
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//We generate data for 4 channels, but only the first 2 are connected on a pc
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Bit16s buf[4][1024];
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Bit16s result[1024][2];
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Bit16s* buffers[4] = { buf[0], buf[1], buf[2], buf[3] };
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while (samples > 0) {
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Bitu todo = samples > 1024 ? 1024 : samples;
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samples -= todo;
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ymf262_update_one(chip, buffers, todo);
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//Interleave the samples before mixing
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for (Bitu i = 0; i < todo; i++) {
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result[i][0] = buf[0][i];
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result[i][1] = buf[1][i];
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}
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chan->AddSamples_s16(todo, result[0]);
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}
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}
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virtual void Init(Bitu rate) {
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chip = ymf262_init(0, OPL3_INTERNAL_FREQ, rate);
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}
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~Handler() {
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ymf262_shutdown(chip);
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}
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};
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}
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#define RAW_SIZE 1024
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/*
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Main Adlib implementation
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*/
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namespace Adlib {
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/* Raw DRO capture stuff */
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#ifdef _MSC_VER
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#pragma pack (1)
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#endif
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#define HW_OPL2 0
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#define HW_DUALOPL2 1
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#define HW_OPL3 2
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struct RawHeader {
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Bit8u id[8]; /* 0x00, "DBRAWOPL" */
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Bit16u versionHigh; /* 0x08, size of the data following the m */
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Bit16u versionLow; /* 0x0a, size of the data following the m */
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Bit32u commands; /* 0x0c, Bit32u amount of command/data pairs */
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Bit32u milliseconds; /* 0x10, Bit32u Total milliseconds of data in this chunk */
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Bit8u hardware; /* 0x14, Bit8u Hardware Type 0=opl2,1=dual-opl2,2=opl3 */
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Bit8u format; /* 0x15, Bit8u Format 0=cmd/data interleaved, 1 maybe all cdms, followed by all data */
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Bit8u compression; /* 0x16, Bit8u Compression Type, 0 = No Compression */
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Bit8u delay256; /* 0x17, Bit8u Delay 1-256 msec command */
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Bit8u delayShift8; /* 0x18, Bit8u (delay + 1)*256 */
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Bit8u conversionTableSize; /* 0x191, Bit8u Raw Conversion Table size */
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} GCC_ATTRIBUTE(packed);
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#ifdef _MSC_VER
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#pragma pack()
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#endif
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/*
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The Raw Tables is < 128 and is used to convert raw commands into a full register index
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When the high bit of a raw command is set it indicates the cmd/data pair is to be sent to the 2nd port
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After the conversion table the raw data follows immediatly till the end of the chunk
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*/
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//Table to map the opl register to one <127 for dro saving
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class Capture {
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//127 entries to go from raw data to registers
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Bit8u ToReg[127];
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//How many entries in the ToPort are used
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Bit8u RawUsed;
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//256 entries to go from port index to raw data
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Bit8u ToRaw[256];
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Bit8u delay256;
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Bit8u delayShift8;
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RawHeader header;
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FILE* handle; //File used for writing
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Bit32u startTicks; //Start used to check total raw length on end
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Bit32u lastTicks; //Last ticks when last last cmd was added
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Bit8u buf[1024]; //16 added for delay commands and what not
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Bit32u bufUsed;
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Bit8u cmd[2]; //Last cmd's sent to either ports
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bool doneOpl3;
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bool doneDualOpl2;
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RegisterCache* cache;
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void MakeEntry( Bit8u reg, Bit8u& raw ) {
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ToReg[ raw ] = reg;
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ToRaw[ reg ] = raw;
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raw++;
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}
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void MakeTables( void ) {
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Bit8u index = 0;
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memset( ToReg, 0xff, sizeof ( ToReg ) );
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memset( ToRaw, 0xff, sizeof ( ToRaw ) );
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//Select the entries that are valid and the index is the mapping to the index entry
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MakeEntry( 0x01, index ); //0x01: Waveform select
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MakeEntry( 0x04, index ); //104: Four-Operator Enable
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MakeEntry( 0x05, index ); //105: OPL3 Mode Enable
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MakeEntry( 0x08, index ); //08: CSW / NOTE-SEL
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MakeEntry( 0xbd, index ); //BD: Tremolo Depth / Vibrato Depth / Percussion Mode / BD/SD/TT/CY/HH On
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//Add the 32 byte range that hold the 18 operators
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for ( int i = 0 ; i < 24; i++ ) {
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if ( (i & 7) < 6 ) {
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MakeEntry(0x20 + i, index ); //20-35: Tremolo / Vibrato / Sustain / KSR / Frequency Multiplication Facto
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MakeEntry(0x40 + i, index ); //40-55: Key Scale Level / Output Level
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MakeEntry(0x60 + i, index ); //60-75: Attack Rate / Decay Rate
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MakeEntry(0x80 + i, index ); //80-95: Sustain Level / Release Rate
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MakeEntry(0xe0 + i, index ); //E0-F5: Waveform Select
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}
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}
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//Add the 9 byte range that hold the 9 channels
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for ( int i = 0 ; i < 9; i++ ) {
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MakeEntry(0xa0 + i, index ); //A0-A8: Frequency Number
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MakeEntry(0xb0 + i, index ); //B0-B8: Key On / Block Number / F-Number(hi bits)
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MakeEntry(0xc0 + i, index ); //C0-C8: FeedBack Modulation Factor / Synthesis Type
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}
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//Store the amount of bytes the table contains
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RawUsed = index;
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// assert( RawUsed <= 127 );
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delay256 = RawUsed;
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delayShift8 = RawUsed+1;
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}
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void ClearBuf( void ) {
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fwrite( buf, 1, bufUsed, handle );
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header.commands += bufUsed / 2;
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bufUsed = 0;
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}
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void AddBuf( Bit8u raw, Bit8u val ) {
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buf[bufUsed++] = raw;
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buf[bufUsed++] = val;
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if ( bufUsed >= sizeof( buf ) ) {
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ClearBuf();
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}
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}
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void AddWrite( Bit32u regFull, Bit8u val ) {
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Bit8u regMask = regFull & 0xff;
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/*
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Do some special checks if we're doing opl3 or dualopl2 commands
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Although you could pretty much just stick to always doing opl3 on the player side
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*/
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//Enabling opl3 4op modes will make us go into opl3 mode
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if ( header.hardware != HW_OPL3 && regFull == 0x104 && val && (*cache)[0x105] ) {
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header.hardware = HW_OPL3;
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}
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//Writing a keyon to a 2nd address enables dual opl2 otherwise
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//Maybe also check for rhythm
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if ( header.hardware == HW_OPL2 && regFull >= 0x1b0 && regFull <=0x1b8 && val ) {
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header.hardware = HW_DUALOPL2;
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}
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Bit8u raw = ToRaw[ regMask ];
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if ( raw == 0xff )
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return;
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if ( regFull & 0x100 )
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raw |= 128;
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AddBuf( raw, val );
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}
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void WriteCache( void ) {
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Bitu i, val;
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/* Check the registers to add */
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for (i=0;i<256;i++) {
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//Skip the note on entries
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if (i>=0xb0 && i<=0xb8)
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continue;
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val = (*cache)[ i ];
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if (val) {
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AddWrite( i, val );
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}
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val = (*cache)[ 0x100 + i ];
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if (val) {
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AddWrite( 0x100 + i, val );
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}
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}
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}
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void InitHeader( void ) {
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memset( &header, 0, sizeof( header ) );
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memcpy( header.id, "DBRAWOPL", 8 );
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header.versionLow = 0;
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header.versionHigh = 2;
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header.delay256 = delay256;
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header.delayShift8 = delayShift8;
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header.conversionTableSize = RawUsed;
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}
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void CloseFile( void ) {
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if ( handle ) {
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ClearBuf();
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/* Endianize the header and write it to beginning of the file */
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var_write( &header.versionHigh, header.versionHigh );
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var_write( &header.versionLow, header.versionLow );
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var_write( &header.commands, header.commands );
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var_write( &header.milliseconds, header.milliseconds );
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fseek( handle, 0, SEEK_SET );
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fwrite( &header, 1, sizeof( header ), handle );
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fclose( handle );
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handle = 0;
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}
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}
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public:
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bool DoWrite( Bit32u regFull, Bit8u val ) {
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Bit8u regMask = regFull & 0xff;
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//Check the raw index for this register if we actually have to save it
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if ( handle ) {
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/*
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Check if we actually care for this to be logged, else just ignore it
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*/
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Bit8u raw = ToRaw[ regMask ];
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if ( raw == 0xff ) {
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return true;
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}
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/* Check if this command will not just replace the same value
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in a reg that doesn't do anything with it
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*/
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if ( (*cache)[ regFull ] == val )
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return true;
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/* Check how much time has passed */
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Bitu passed = PIC_Ticks - lastTicks;
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lastTicks = PIC_Ticks;
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header.milliseconds += passed;
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//if ( passed > 0 ) LOG_MSG( "Delay %d", passed ) ;
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// If we passed more than 30 seconds since the last command, we'll restart the the capture
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if ( passed > 30000 ) {
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CloseFile();
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goto skipWrite;
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}
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while (passed > 0) {
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if (passed < 257) { //1-256 millisecond delay
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AddBuf( delay256, passed - 1 );
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passed = 0;
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} else {
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Bitu shift = (passed >> 8);
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passed -= shift << 8;
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AddBuf( delayShift8, shift - 1 );
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}
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}
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AddWrite( regFull, val );
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return true;
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}
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skipWrite:
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//Not yet capturing to a file here
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//Check for commands that would start capturing, if it's not one of them return
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if ( !(
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//note on in any channel
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( regMask>=0xb0 && regMask<=0xb8 && (val&0x020) ) ||
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//Percussion mode enabled and a note on in any percussion instrument
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( regMask == 0xbd && ( (val&0x3f) > 0x20 ) )
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)) {
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return true;
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}
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handle = OpenCaptureFile("Raw Opl",".dro");
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if (!handle)
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return false;
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InitHeader();
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//Prepare space at start of the file for the header
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fwrite( &header, 1, sizeof(header), handle );
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/* write the Raw To Reg table */
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fwrite( &ToReg, 1, RawUsed, handle );
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/* Write the cache of last commands */
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WriteCache( );
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/* Write the command that triggered this */
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AddWrite( regFull, val );
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//Init the timing information for the next commands
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lastTicks = PIC_Ticks;
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startTicks = PIC_Ticks;
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return true;
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}
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Capture( RegisterCache* _cache ) {
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cache = _cache;
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handle = 0;
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bufUsed = 0;
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MakeTables();
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}
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~Capture() {
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CloseFile();
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}
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};
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/*
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Chip
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*/
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bool Chip::Write( Bit32u reg, Bit8u val ) {
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switch ( reg ) {
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case 0x02:
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timer[0].counter = val;
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return true;
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case 0x03:
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timer[1].counter = val;
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return true;
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case 0x04:
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double time;
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time = PIC_FullIndex();
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if ( val & 0x80 ) {
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timer[0].Reset( time );
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timer[1].Reset( time );
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} else {
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timer[0].Update( time );
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timer[1].Update( time );
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if ( val & 0x1 ) {
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timer[0].Start( time, 80 );
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} else {
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timer[0].Stop( );
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}
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timer[0].masked = (val & 0x40) > 0;
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if ( timer[0].masked )
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timer[0].overflow = false;
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if ( val & 0x2 ) {
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timer[1].Start( time, 320 );
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} else {
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timer[1].Stop( );
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}
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timer[1].masked = (val & 0x20) > 0;
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if ( timer[1].masked )
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timer[1].overflow = false;
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}
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return true;
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}
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return false;
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}
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Bit8u Chip::Read( ) {
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double time( PIC_FullIndex() );
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timer[0].Update( time );
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timer[1].Update( time );
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Bit8u ret = 0;
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//Overflow won't be set if a channel is masked
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if ( timer[0].overflow ) {
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ret |= 0x40;
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ret |= 0x80;
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}
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if ( timer[1].overflow ) {
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ret |= 0x20;
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ret |= 0x80;
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}
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return ret;
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}
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void Module::CacheWrite( Bit32u reg, Bit8u val ) {
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//capturing?
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if ( capture ) {
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capture->DoWrite( reg, val );
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}
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//Store it into the cache
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cache[ reg ] = val;
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}
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void Module::DualWrite( Bit8u index, Bit8u reg, Bit8u val ) {
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//Make sure you don't use opl3 features
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//Don't allow write to disable opl3
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if ( reg == 5 ) {
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return;
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}
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//Only allow 4 waveforms
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if ( reg >= 0xE0 ) {
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val &= 3;
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}
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//Write to the timer?
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if ( chip[index].Write( reg, val ) )
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return;
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//Enabling panning
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if ( reg >= 0xc0 && reg <=0xc8 ) {
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val &= 0x0f;
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val |= index ? 0xA0 : 0x50;
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}
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Bit32u fullReg = reg + (index ? 0x100 : 0);
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handler->WriteReg( fullReg, val );
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|
CacheWrite( fullReg, val );
|
|
}
|
|
|
|
void Module::CtrlWrite( Bit8u val ) {
|
|
switch ( ctrl.index ) {
|
|
case 0x09: /* Left FM Volume */
|
|
ctrl.lvol = val;
|
|
goto setvol;
|
|
case 0x0a: /* Right FM Volume */
|
|
ctrl.rvol = val;
|
|
setvol:
|
|
if ( ctrl.mixer ) {
|
|
//Dune cdrom uses 32 volume steps in an apparent mistake, should be 128
|
|
mixerChan->SetVolume( (float)(ctrl.lvol&0x1f)/31.0f, (float)(ctrl.rvol&0x1f)/31.0f );
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
Bitu Module::CtrlRead( void ) {
|
|
switch ( ctrl.index ) {
|
|
case 0x00: /* Board Options */
|
|
return 0x70; //No options installed
|
|
case 0x09: /* Left FM Volume */
|
|
return ctrl.lvol;
|
|
case 0x0a: /* Right FM Volume */
|
|
return ctrl.rvol;
|
|
case 0x15: /* Audio Relocation */
|
|
return 0x388 >> 3; //Cryo installer detection
|
|
}
|
|
return 0xff;
|
|
}
|
|
|
|
|
|
void Module::PortWrite( Bitu port, Bitu val, Bitu iolen ) {
|
|
//Keep track of last write time
|
|
lastUsed = PIC_Ticks;
|
|
//Maybe only enable with a keyon?
|
|
if ( !mixerChan->enabled ) {
|
|
mixerChan->Enable(true);
|
|
}
|
|
if ( port&1 ) {
|
|
switch ( mode ) {
|
|
case MODE_OPL3GOLD:
|
|
if ( port == 0x38b ) {
|
|
if ( ctrl.active ) {
|
|
CtrlWrite( val );
|
|
break;
|
|
}
|
|
}
|
|
//Fall-through if not handled by control chip
|
|
case MODE_OPL2:
|
|
case MODE_OPL3:
|
|
if ( !chip[0].Write( reg.normal, val ) ) {
|
|
handler->WriteReg( reg.normal, val );
|
|
CacheWrite( reg.normal, val );
|
|
}
|
|
break;
|
|
case MODE_DUALOPL2:
|
|
//Not a 0x??8 port, then write to a specific port
|
|
if ( !(port & 0x8) ) {
|
|
Bit8u index = ( port & 2 ) >> 1;
|
|
DualWrite( index, reg.dual[index], val );
|
|
} else {
|
|
//Write to both ports
|
|
DualWrite( 0, reg.dual[0], val );
|
|
DualWrite( 1, reg.dual[1], val );
|
|
}
|
|
break;
|
|
}
|
|
} else {
|
|
//Ask the handler to write the address
|
|
//Make sure to clip them in the right range
|
|
switch ( mode ) {
|
|
case MODE_OPL2:
|
|
reg.normal = handler->WriteAddr( port, val ) & 0xff;
|
|
break;
|
|
case MODE_OPL3GOLD:
|
|
if ( port == 0x38a ) {
|
|
if ( val == 0xff ) {
|
|
ctrl.active = true;
|
|
break;
|
|
} else if ( val == 0xfe ) {
|
|
ctrl.active = false;
|
|
break;
|
|
} else if ( ctrl.active ) {
|
|
ctrl.index = val & 0xff;
|
|
break;
|
|
}
|
|
}
|
|
//Fall-through if not handled by control chip
|
|
case MODE_OPL3:
|
|
reg.normal = handler->WriteAddr( port, val ) & 0x1ff;
|
|
break;
|
|
case MODE_DUALOPL2:
|
|
//Not a 0x?88 port, when write to a specific side
|
|
if ( !(port & 0x8) ) {
|
|
Bit8u index = ( port & 2 ) >> 1;
|
|
reg.dual[index] = val & 0xff;
|
|
} else {
|
|
reg.dual[0] = val & 0xff;
|
|
reg.dual[1] = val & 0xff;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
Bitu Module::PortRead( Bitu port, Bitu iolen ) {
|
|
switch ( mode ) {
|
|
case MODE_OPL2:
|
|
//We allocated 4 ports, so just return -1 for the higher ones
|
|
if ( !(port & 3 ) ) {
|
|
//Make sure the low bits are 6 on opl2
|
|
return chip[0].Read() | 0x6;
|
|
} else {
|
|
return 0xff;
|
|
}
|
|
case MODE_OPL3GOLD:
|
|
if ( ctrl.active ) {
|
|
if ( port == 0x38a ) {
|
|
return 0; //Control status, not busy
|
|
} else if ( port == 0x38b ) {
|
|
return CtrlRead();
|
|
}
|
|
}
|
|
//Fall-through if not handled by control chip
|
|
case MODE_OPL3:
|
|
//We allocated 4 ports, so just return -1 for the higher ones
|
|
if ( !(port & 3 ) ) {
|
|
return chip[0].Read();
|
|
} else {
|
|
return 0xff;
|
|
}
|
|
case MODE_DUALOPL2:
|
|
//Only return for the lower ports
|
|
if ( port & 1 ) {
|
|
return 0xff;
|
|
}
|
|
//Make sure the low bits are 6 on opl2
|
|
return chip[ (port >> 1) & 1].Read() | 0x6;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
void Module::Init( Mode m ) {
|
|
mode = m;
|
|
switch ( mode ) {
|
|
case MODE_OPL3:
|
|
case MODE_OPL3GOLD:
|
|
case MODE_OPL2:
|
|
break;
|
|
case MODE_DUALOPL2:
|
|
//Setup opl3 mode in the hander
|
|
handler->WriteReg( 0x105, 1 );
|
|
//Also set it up in the cache so the capturing will start opl3
|
|
CacheWrite( 0x105, 1 );
|
|
break;
|
|
}
|
|
}
|
|
|
|
}; //namespace
|
|
|
|
|
|
|
|
static Adlib::Module* module = 0;
|
|
|
|
static void OPL_CallBack(Bitu len) {
|
|
module->handler->Generate( module->mixerChan, len );
|
|
//Disable the sound generation after 30 seconds of silence
|
|
if ((PIC_Ticks - module->lastUsed) > 30000) {
|
|
Bitu i;
|
|
for (i=0xb0;i<0xb9;i++) if (module->cache[i]&0x20||module->cache[i+0x100]&0x20) break;
|
|
if (i==0xb9) module->mixerChan->Enable(false);
|
|
else module->lastUsed = PIC_Ticks;
|
|
}
|
|
}
|
|
|
|
static Bitu OPL_Read(Bitu port,Bitu iolen) {
|
|
return module->PortRead( port, iolen );
|
|
}
|
|
|
|
void OPL_Write(Bitu port,Bitu val,Bitu iolen) {
|
|
module->PortWrite( port, val, iolen );
|
|
}
|
|
|
|
/*
|
|
Save the current state of the operators as instruments in an reality adlib tracker file
|
|
*/
|
|
static void SaveRad() {
|
|
char b[16 * 1024];
|
|
int w = 0;
|
|
|
|
FILE* handle = OpenCaptureFile("RAD Capture",".rad");
|
|
if ( !handle )
|
|
return;
|
|
//Header
|
|
fwrite( "RAD by REALiTY!!", 1, 16, handle );
|
|
b[w++] = 0x10; //version
|
|
b[w++] = 0x06; //default speed and no description
|
|
//Write 18 instuments for all operators in the cache
|
|
for ( int i = 0; i < 18; i++ ) {
|
|
Bit8u* set = module->cache + ( i / 9 ) * 256;
|
|
Bitu offset = ((i % 9) / 3) * 8 + (i % 3);
|
|
Bit8u* base = set + offset;
|
|
b[w++] = 1 + i; //instrument number
|
|
b[w++] = base[0x23];
|
|
b[w++] = base[0x20];
|
|
b[w++] = base[0x43];
|
|
b[w++] = base[0x40];
|
|
b[w++] = base[0x63];
|
|
b[w++] = base[0x60];
|
|
b[w++] = base[0x83];
|
|
b[w++] = base[0x80];
|
|
b[w++] = set[0xc0 + (i % 9)];
|
|
b[w++] = base[0xe3];
|
|
b[w++] = base[0xe0];
|
|
}
|
|
b[w++] = 0; //instrument 0, no more instruments following
|
|
b[w++] = 1; //1 pattern following
|
|
//Zero out the remaing part of the file a bit to make rad happy
|
|
for ( int i = 0; i < 64; i++ ) {
|
|
b[w++] = 0;
|
|
}
|
|
fwrite( b, 1, w, handle );
|
|
fclose( handle );
|
|
};
|
|
|
|
|
|
static void OPL_SaveRawEvent(bool pressed) {
|
|
if (!pressed)
|
|
return;
|
|
// SaveRad();return;
|
|
/* Check for previously opened wave file */
|
|
if ( module->capture ) {
|
|
delete module->capture;
|
|
module->capture = 0;
|
|
LOG_MSG("Stopped Raw OPL capturing.");
|
|
} else {
|
|
LOG_MSG("Preparing to capture Raw OPL, will start with first note played.");
|
|
module->capture = new Adlib::Capture( &module->cache );
|
|
}
|
|
}
|
|
|
|
namespace Adlib {
|
|
|
|
Module::Module( Section* configuration ) : Module_base(configuration) {
|
|
reg.dual[0] = 0;
|
|
reg.dual[1] = 0;
|
|
reg.normal = 0;
|
|
ctrl.active = false;
|
|
ctrl.index = 0;
|
|
ctrl.lvol = 0xff;
|
|
ctrl.rvol = 0xff;
|
|
handler = 0;
|
|
capture = 0;
|
|
|
|
Section_prop * section=static_cast<Section_prop *>(configuration);
|
|
Bitu base = section->Get_hex("sbbase");
|
|
Bitu rate = section->Get_int("oplrate");
|
|
//Make sure we can't select lower than 8000 to prevent fixed point issues
|
|
if ( rate < 8000 )
|
|
rate = 8000;
|
|
std::string oplemu( section->Get_string( "oplemu" ) );
|
|
ctrl.mixer = section->Get_bool("sbmixer");
|
|
|
|
mixerChan = mixerObject.Install(OPL_CallBack,rate,"FM");
|
|
//Used to be 2.0, which was measured to be too high. Exact value depends on card/clone.
|
|
mixerChan->SetScale( 1.5f );
|
|
|
|
if (oplemu == "fast") {
|
|
handler = new DBOPL::Handler();
|
|
} else if (oplemu == "compat") {
|
|
if ( oplmode == OPL_opl2 ) {
|
|
handler = new OPL2::Handler();
|
|
} else {
|
|
handler = new OPL3::Handler();
|
|
}
|
|
}
|
|
else if (oplemu == "mame") {
|
|
if (oplmode == OPL_opl2) {
|
|
handler = new MAMEOPL2::Handler();
|
|
}
|
|
else {
|
|
handler = new MAMEOPL3::Handler();
|
|
}
|
|
} else {
|
|
handler = new DBOPL::Handler();
|
|
}
|
|
handler->Init( rate );
|
|
bool single = false;
|
|
switch ( oplmode ) {
|
|
case OPL_opl2:
|
|
single = true;
|
|
Init( Adlib::MODE_OPL2 );
|
|
break;
|
|
case OPL_dualopl2:
|
|
Init( Adlib::MODE_DUALOPL2 );
|
|
break;
|
|
case OPL_opl3:
|
|
Init( Adlib::MODE_OPL3 );
|
|
break;
|
|
case OPL_opl3gold:
|
|
Init( Adlib::MODE_OPL3GOLD );
|
|
break;
|
|
}
|
|
//0x388 range
|
|
WriteHandler[0].Install(0x388,OPL_Write,IO_MB, 4 );
|
|
ReadHandler[0].Install(0x388,OPL_Read,IO_MB, 4 );
|
|
//0x220 range
|
|
if ( !single ) {
|
|
WriteHandler[1].Install(base,OPL_Write,IO_MB, 4 );
|
|
ReadHandler[1].Install(base,OPL_Read,IO_MB, 4 );
|
|
}
|
|
//0x228 range
|
|
WriteHandler[2].Install(base+8,OPL_Write,IO_MB, 2);
|
|
ReadHandler[2].Install(base+8,OPL_Read,IO_MB, 1);
|
|
|
|
MAPPER_AddHandler(OPL_SaveRawEvent,MK_f7,MMOD1|MMOD2,"caprawopl","Cap OPL");
|
|
}
|
|
|
|
Module::~Module() {
|
|
if ( capture ) {
|
|
delete capture;
|
|
}
|
|
if ( handler ) {
|
|
delete handler;
|
|
}
|
|
}
|
|
|
|
//Initialize static members
|
|
OPL_Mode Module::oplmode=OPL_none;
|
|
|
|
}; //Adlib Namespace
|
|
|
|
|
|
void OPL_Init(Section* sec,OPL_Mode oplmode) {
|
|
Adlib::Module::oplmode = oplmode;
|
|
module = new Adlib::Module( sec );
|
|
}
|
|
|
|
void OPL_ShutDown(Section* sec){
|
|
delete module;
|
|
module = 0;
|
|
|
|
}
|