mirror of
https://github.com/retro100/dosbox-wii.git
synced 2024-11-17 15:49:15 +01:00
134 lines
3.8 KiB
C++
134 lines
3.8 KiB
C++
/*
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* Copyright (C) 2002-2006 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include "dosbox.h"
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#include "inout.h"
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#include "pic.h"
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#include "vga.h"
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static Bit8u flip=0;
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void vga_write_p3d4(Bitu port,Bitu val,Bitu iolen);
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Bitu vga_read_p3d4(Bitu port,Bitu iolen);
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void vga_write_p3d5(Bitu port,Bitu val,Bitu iolen);
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Bitu vga_read_p3d5(Bitu port,Bitu iolen);
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static Bitu vga_read_p3da(Bitu port,Bitu iolen) {
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vga.internal.attrindex=false;
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vga.tandy.pcjr_flipflop=false;
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if (vga.config.retrace) {
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switch (machine) {
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case MCH_HERC:
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return 0x81;
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default:
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return 9;
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}
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}
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flip++;
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if (flip>20) flip=0;
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if (flip>10) return 1;
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return 0;
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/*
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0 Either Vertical or Horizontal Retrace active if set
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3 Vertical Retrace in progress if set
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*/
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}
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static void write_p3c2(Bitu port,Bitu val,Bitu iolen) {
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vga.misc_output=val;
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if (val & 0x1) {
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IO_RegisterWriteHandler(0x3d4,vga_write_p3d4,IO_MB);
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IO_RegisterReadHandler(0x3d4,vga_read_p3d4,IO_MB);
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IO_RegisterReadHandler(0x3da,vga_read_p3da,IO_MB);
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IO_RegisterWriteHandler(0x3d5,vga_write_p3d5,IO_MB);
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IO_RegisterReadHandler(0x3d5,vga_read_p3d5,IO_MB);
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IO_FreeWriteHandler(0x3b4,IO_MB);
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IO_FreeReadHandler(0x3b4,IO_MB);
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IO_FreeWriteHandler(0x3b5,IO_MB);
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IO_FreeReadHandler(0x3b5,IO_MB);
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IO_FreeReadHandler(0x3ba,IO_MB);
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} else {
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IO_RegisterWriteHandler(0x3b4,vga_write_p3d4,IO_MB);
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IO_RegisterReadHandler(0x3b4,vga_read_p3d4,IO_MB);
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IO_RegisterReadHandler(0x3ba,vga_read_p3da,IO_MB);
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IO_RegisterWriteHandler(0x3b5,vga_write_p3d5,IO_MB);
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IO_RegisterReadHandler(0x3b5,vga_read_p3d5,IO_MB);
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IO_FreeWriteHandler(0x3d4,IO_MB);
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IO_FreeReadHandler(0x3d4,IO_MB);
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IO_FreeWriteHandler(0x3d5,IO_MB);
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IO_FreeReadHandler(0x3d5,IO_MB);
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IO_FreeReadHandler(0x3da,IO_MB);
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}
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/*
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0 If set Color Emulation. Base Address=3Dxh else Mono Emulation. Base Address=3Bxh.
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2-3 Clock Select. 0: 25MHz, 1: 28MHz
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5 When in Odd/Even modes Select High 64k bank if set
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6 Horizontal Sync Polarity. Negative if set
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7 Vertical Sync Polarity. Negative if set
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Bit 6-7 indicates the number of lines on the display:
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1: 400, 2: 350, 3: 480
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Note: Set to all zero on a hardware reset.
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Note: This register can be read from port 3CCh.
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*/
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}
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static Bitu read_p3cc(Bitu port,Bitu iolen) {
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return vga.misc_output;
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}
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/*
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Test 13: Hardware: General Registers
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Mode 00h, General -- Feat Ctrl: IBM=00h Current=FFh
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Mode 00h, General -- Input Status 0: IBM=70h Current=FFh
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.. & modes 1,2,3,4,5,6,d,e,10,11,12,13
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following read handlers silence the above vgatest errors.
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*/
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static Bitu read_p3ca(Bitu port,Bitu iolen) {
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return 0;
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}
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static Bitu read_p3c2(Bitu port,Bitu iolen) {
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return 0x70;
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}
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void VGA_SetupMisc(void) {
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if (machine==MCH_VGA) {
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IO_RegisterReadHandler(0x3ca,read_p3ca,IO_MB);
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IO_RegisterReadHandler(0x3c2,read_p3c2,IO_MB);
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IO_RegisterWriteHandler(0x3c2,write_p3c2,IO_MB);
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IO_RegisterReadHandler(0x3cc,read_p3cc,IO_MB);
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} else if (machine==MCH_CGA || IS_TANDY_ARCH) {
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IO_RegisterReadHandler(0x3da,vga_read_p3da,IO_MB);
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} else if (machine==MCH_HERC) {
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IO_RegisterReadHandler(0x3ba,vga_read_p3da,IO_MB);
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}
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}
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