mirror of
https://github.com/retro100/dosbox-wii.git
synced 2024-06-25 21:56:11 +02:00
317 lines
8.5 KiB
C++
317 lines
8.5 KiB
C++
/*
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* Copyright (C) 2002-2019 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <stdio.h>
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#include "dosbox.h"
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#include "mem.h"
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#include "cpu.h"
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#include "lazyflags.h"
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#include "inout.h"
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#include "callback.h"
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#include "pic.h"
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#include "fpu.h"
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#include "paging.h"
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#if C_DEBUG
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#include "debug.h"
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#endif
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#if (!C_CORE_INLINE)
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#define LoadMb(off) mem_readb(off)
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#define LoadMw(off) mem_readw(off)
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#define LoadMd(off) mem_readd(off)
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#define SaveMb(off,val) mem_writeb(off,val)
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#define SaveMw(off,val) mem_writew(off,val)
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#define SaveMd(off,val) mem_writed(off,val)
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#else
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#include "paging.h"
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#define LoadMb(off) mem_readb_inline(off)
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#define LoadMw(off) mem_readw_inline(off)
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#define LoadMd(off) mem_readd_inline(off)
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#define SaveMb(off,val) mem_writeb_inline(off,val)
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#define SaveMw(off,val) mem_writew_inline(off,val)
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#define SaveMd(off,val) mem_writed_inline(off,val)
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#endif
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extern Bitu cycle_count;
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#if C_FPU
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#define CPU_FPU 1 //Enable FPU escape instructions
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#endif
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#define CPU_PIC_CHECK 1
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#define CPU_TRAP_CHECK 1
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#define CPU_TRAP_DECODER CPU_Core_Prefetch_Trap_Run
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#define OPCODE_NONE 0x000
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#define OPCODE_0F 0x100
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#define OPCODE_SIZE 0x200
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#define PREFIX_ADDR 0x1
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#define PREFIX_REP 0x2
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#define TEST_PREFIX_ADDR (core.prefixes & PREFIX_ADDR)
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#define TEST_PREFIX_REP (core.prefixes & PREFIX_REP)
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#define DO_PREFIX_SEG(_SEG) \
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BaseDS=SegBase(_SEG); \
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BaseSS=SegBase(_SEG); \
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core.base_val_ds=_SEG; \
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goto restart_opcode;
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#define DO_PREFIX_ADDR() \
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core.prefixes=(core.prefixes & ~PREFIX_ADDR) | \
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(cpu.code.big ^ PREFIX_ADDR); \
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core.ea_table=&EATable[(core.prefixes&1) * 256]; \
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goto restart_opcode;
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#define DO_PREFIX_REP(_ZERO) \
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core.prefixes|=PREFIX_REP; \
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core.rep_zero=_ZERO; \
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goto restart_opcode;
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typedef PhysPt (*GetEAHandler)(void);
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static const Bit32u AddrMaskTable[2]={0x0000ffff,0xffffffff};
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static struct {
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Bitu opcode_index;
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PhysPt cseip;
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PhysPt base_ds,base_ss;
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SegNames base_val_ds;
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bool rep_zero;
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Bitu prefixes;
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GetEAHandler * ea_table;
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} core;
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#define GETIP (core.cseip-SegBase(cs))
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#define SAVEIP reg_eip=GETIP;
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#define LOADIP core.cseip=(SegBase(cs)+reg_eip);
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#define SegBase(c) SegPhys(c)
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#define BaseDS core.base_ds
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#define BaseSS core.base_ss
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#define MAX_PQ_SIZE 32
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static Bit8u prefetch_buffer[MAX_PQ_SIZE];
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static bool pq_valid=false;
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static Bitu pq_start;
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static Bit8u Fetchb() {
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Bit8u temp;
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if (pq_valid && (core.cseip>=pq_start) && (core.cseip<pq_start+CPU_PrefetchQueueSize)) {
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temp=prefetch_buffer[core.cseip-pq_start];
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if ((core.cseip+1>=pq_start+CPU_PrefetchQueueSize-4) &&
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(core.cseip+1<pq_start+CPU_PrefetchQueueSize)) {
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Bitu remaining_bytes=pq_start+CPU_PrefetchQueueSize-(core.cseip+1);
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for (Bitu i=0; i<remaining_bytes; i++) prefetch_buffer[i]=prefetch_buffer[core.cseip+1-pq_start+i];
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for (Bitu i=remaining_bytes; i<CPU_PrefetchQueueSize; i++) prefetch_buffer[i]=LoadMb(core.cseip+1+i);
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pq_start=core.cseip+1;
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pq_valid=true;
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}
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} else {
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for (Bitu i=0; i<CPU_PrefetchQueueSize; i++) prefetch_buffer[i]=LoadMb(core.cseip+i);
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pq_start=core.cseip;
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pq_valid=true;
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temp=prefetch_buffer[0];
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}
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/* if (temp!=LoadMb(core.cseip)) {
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LOG_MSG("prefetch queue content!=memory at %x:%x",SegValue(cs),reg_eip);
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} */
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core.cseip+=1;
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return temp;
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}
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static Bit16u Fetchw() {
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Bit16u temp;
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if (pq_valid && (core.cseip>=pq_start) && (core.cseip+2<pq_start+CPU_PrefetchQueueSize)) {
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temp=prefetch_buffer[core.cseip-pq_start]|
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(prefetch_buffer[core.cseip-pq_start+1]<<8);
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if ((core.cseip+2>=pq_start+CPU_PrefetchQueueSize-4) &&
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(core.cseip+2<pq_start+CPU_PrefetchQueueSize)) {
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Bitu remaining_bytes=pq_start+CPU_PrefetchQueueSize-(core.cseip+2);
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for (Bitu i=0; i<remaining_bytes; i++) prefetch_buffer[i]=prefetch_buffer[core.cseip+2-pq_start+i];
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for (Bitu i=remaining_bytes; i<CPU_PrefetchQueueSize; i++) prefetch_buffer[i]=LoadMb(core.cseip+2+i);
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pq_start=core.cseip+2;
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pq_valid=true;
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}
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} else {
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for (Bitu i=0; i<CPU_PrefetchQueueSize; i++) prefetch_buffer[i]=LoadMb(core.cseip+i);
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pq_start=core.cseip;
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pq_valid=true;
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temp=prefetch_buffer[0] | (prefetch_buffer[1]<<8);
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}
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/* if (temp!=LoadMw(core.cseip)) {
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LOG_MSG("prefetch queue content!=memory at %x:%x",SegValue(cs),reg_eip);
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} */
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core.cseip+=2;
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return temp;
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}
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static Bit32u Fetchd() {
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Bit32u temp;
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if (pq_valid && (core.cseip>=pq_start) && (core.cseip+4<pq_start+CPU_PrefetchQueueSize)) {
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temp=prefetch_buffer[core.cseip-pq_start]|
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(prefetch_buffer[core.cseip-pq_start+1]<<8)|
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(prefetch_buffer[core.cseip-pq_start+2]<<16)|
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(prefetch_buffer[core.cseip-pq_start+3]<<24);
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if ((core.cseip+4>=pq_start+CPU_PrefetchQueueSize-4) &&
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(core.cseip+4<pq_start+CPU_PrefetchQueueSize)) {
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Bitu remaining_bytes=pq_start+CPU_PrefetchQueueSize-(core.cseip+4);
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for (Bitu i=0; i<remaining_bytes; i++) prefetch_buffer[i]=prefetch_buffer[core.cseip+4-pq_start+i];
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for (Bitu i=remaining_bytes; i<CPU_PrefetchQueueSize; i++) prefetch_buffer[i]=LoadMb(core.cseip+4+i);
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pq_start=core.cseip+4;
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pq_valid=true;
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}
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} else {
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for (Bitu i=0; i<CPU_PrefetchQueueSize; i++) prefetch_buffer[i]=LoadMb(core.cseip+i);
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pq_start=core.cseip;
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pq_valid=true;
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temp=prefetch_buffer[0] | (prefetch_buffer[1]<<8) |
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(prefetch_buffer[2]<<16) | (prefetch_buffer[3]<<24);
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}
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/* if (temp!=LoadMd(core.cseip)) {
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LOG_MSG("prefetch queue content!=memory at %x:%x",SegValue(cs),reg_eip);
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} */
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core.cseip+=4;
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return temp;
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}
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#define Push_16 CPU_Push16
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#define Push_32 CPU_Push32
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#define Pop_16 CPU_Pop16
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#define Pop_32 CPU_Pop32
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#include "instructions.h"
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#include "core_normal/support.h"
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#include "core_normal/string.h"
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#define EALookupTable (core.ea_table)
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Bits CPU_Core_Prefetch_Run(void) {
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bool invalidate_pq=false;
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while (CPU_Cycles-->0) {
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if (invalidate_pq) {
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pq_valid=false;
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invalidate_pq=false;
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}
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LOADIP;
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core.opcode_index=cpu.code.big*0x200;
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core.prefixes=cpu.code.big;
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core.ea_table=&EATable[cpu.code.big*256];
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BaseDS=SegBase(ds);
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BaseSS=SegBase(ss);
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core.base_val_ds=ds;
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#if C_DEBUG
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#if C_HEAVY_DEBUG
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if (DEBUG_HeavyIsBreakpoint()) {
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FillFlags();
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return debugCallback;
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};
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#endif
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cycle_count++;
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#endif
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restart_opcode:
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Bit8u next_opcode=Fetchb();
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invalidate_pq=false;
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if (core.opcode_index&OPCODE_0F) invalidate_pq=true;
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else switch (next_opcode) {
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case 0x70: case 0x71: case 0x72: case 0x73:
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case 0x74: case 0x75: case 0x76: case 0x77:
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case 0x78: case 0x79: case 0x7a: case 0x7b:
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case 0x7c: case 0x7d: case 0x7e: case 0x7f: // jcc
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case 0x9a: // call
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case 0xc2: case 0xc3: // retn
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case 0xc8: // enter
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case 0xc9: // leave
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case 0xca: case 0xcb: // retf
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case 0xcc: // int3
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case 0xcd: // int
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case 0xce: // into
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case 0xcf: // iret
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case 0xe0: // loopnz
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case 0xe1: // loopz
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case 0xe2: // loop
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case 0xe3: // jcxz
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case 0xe8: // call
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case 0xe9: case 0xea: case 0xeb: // jmp
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case 0xff:
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invalidate_pq=true;
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break;
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default:
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break;
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}
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switch (core.opcode_index+next_opcode) {
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#include "core_normal/prefix_none.h"
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#include "core_normal/prefix_0f.h"
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#include "core_normal/prefix_66.h"
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#include "core_normal/prefix_66_0f.h"
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default:
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illegal_opcode:
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#if C_DEBUG
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{
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Bitu len=(GETIP-reg_eip);
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LOADIP;
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if (len>16) len=16;
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char tempcode[16*2+1];char * writecode=tempcode;
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for (;len>0;len--) {
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sprintf(writecode,"%02X",mem_readb(core.cseip++));
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writecode+=2;
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}
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LOG(LOG_CPU,LOG_NORMAL)("Illegal/Unhandled opcode %s",tempcode);
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}
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#endif
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CPU_Exception(6,0);
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invalidate_pq=true;
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continue;
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}
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SAVEIP;
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}
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FillFlags();
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return CBRET_NONE;
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decode_end:
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SAVEIP;
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FillFlags();
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return CBRET_NONE;
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}
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Bits CPU_Core_Prefetch_Trap_Run(void) {
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Bits oldCycles = CPU_Cycles;
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CPU_Cycles = 1;
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cpu.trap_skip = false;
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Bits ret=CPU_Core_Prefetch_Run();
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if (!cpu.trap_skip) CPU_HW_Interrupt(1);
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CPU_Cycles = oldCycles-1;
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cpudecoder = &CPU_Core_Prefetch_Run;
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return ret;
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}
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void CPU_Core_Prefetch_Init(void) {
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}
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