mirror of
https://github.com/retro100/dosbox-wii.git
synced 2024-06-28 15:16:11 +02:00
242 lines
6.6 KiB
C++
242 lines
6.6 KiB
C++
/*
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* Copyright (C) 2002-2019 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include "dosbox.h"
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#include "setup.h"
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#include "vga.h"
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#include "inout.h"
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#include "mem.h"
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typedef struct {
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Bitu PR0A;
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Bitu PR0B;
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Bitu PR1;
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Bitu PR2;
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Bitu PR3;
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Bitu PR4;
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Bitu PR5;
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inline bool locked() { return (PR5&7)!=5; }
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Bitu clockFreq[4];
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Bitu biosMode;
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} SVGA_PVGA1A_DATA;
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static SVGA_PVGA1A_DATA pvga1a = { 0,0, 0,0,0,0,0, {0,0,0,0}, 0 };
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static void bank_setup_pvga1a() {
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// Note: There is some inconsistency in available documentation. Most sources tell that PVGA1A used
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// only 7 bits of bank index (VGADOC and Ferraro agree on that) but also point that there are
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// implementations with 1M of RAM which is simply not possible with 7-bit banks. This implementation
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// assumes that the eighth bit was actually wired and could be used. This does not conflict with
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// anything and actually works in WHATVGA just fine.
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if (pvga1a.PR1 & 0x08) {
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// TODO: Dual bank function is not supported yet
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// TODO: Requirements are not compatible with vga_memory implementation.
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} else {
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// Single bank config is straightforward
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vga.svga.bank_read = vga.svga.bank_write = pvga1a.PR0A;
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vga.svga.bank_size = 4*1024;
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VGA_SetupHandlers();
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}
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}
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void write_p3cf_pvga1a(Bitu reg,Bitu val,Bitu iolen) {
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if (pvga1a.locked() && reg >= 0x09 && reg <= 0x0e)
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return;
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switch (reg) {
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case 0x09:
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// Bank A, 4K granularity, not using bit 7
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// Maps to A800h-AFFFh if PR1 bit 3 set and 64k config B000h-BFFFh if 128k config. A000h-AFFFh otherwise.
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pvga1a.PR0A = val;
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bank_setup_pvga1a();
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break;
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case 0x0a:
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// Bank B, 4K granularity, not using bit 7
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// Maps to A000h-A7FFh if PR1 bit 3 set and 64k config, A000h-AFFFh if 128k
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pvga1a.PR0B = val;
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bank_setup_pvga1a();
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break;
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case 0x0b:
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// Memory size. We only allow to mess with bit 3 here (enable bank B) - this may break some detection schemes
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pvga1a.PR1 = (pvga1a.PR1 & ~0x08) | (val & 0x08);
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bank_setup_pvga1a();
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break;
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case 0x0c:
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// Video configuration
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// TODO: Figure out if there is anything worth implementing here.
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pvga1a.PR2 = val;
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break;
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case 0x0d:
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// CRT control. Bits 3-4 contain bits 16-17 of CRT start.
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// TODO: Implement bit 2 (CRT address doubling - this mechanism is present in other chipsets as well,
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// but not implemented in DosBox core)
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pvga1a.PR3 = val;
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vga.config.display_start = (vga.config.display_start & 0xffff) | ((val & 0x18)<<13);
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vga.config.cursor_start = (vga.config.cursor_start & 0xffff) | ((val & 0x18)<<13);
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break;
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case 0x0e:
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// Video control
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// TODO: Figure out if there is anything worth implementing here.
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pvga1a.PR4 = val;
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break;
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case 0x0f:
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// Enable extended registers
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pvga1a.PR5 = val;
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break;
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default:
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LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:GFX:PVGA1A:Write to illegal index %2X", reg);
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break;
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}
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}
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Bitu read_p3cf_pvga1a(Bitu reg,Bitu iolen) {
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if (pvga1a.locked() && reg >= 0x09 && reg <= 0x0e)
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return 0x0;
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switch (reg) {
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case 0x09:
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return pvga1a.PR0A;
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case 0x0a:
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return pvga1a.PR0B;
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case 0x0b:
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return pvga1a.PR1;
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case 0x0c:
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return pvga1a.PR2;
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case 0x0d:
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return pvga1a.PR3;
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case 0x0e:
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return pvga1a.PR4;
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case 0x0f:
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return pvga1a.PR5;
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default:
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LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:GFX:PVGA1A:Read from illegal index %2X", reg);
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break;
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}
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return 0x0;
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}
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void FinishSetMode_PVGA1A(Bitu /*crtc_base*/, VGA_ModeExtraData* modeData) {
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pvga1a.biosMode = modeData->modeNo;
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// Reset to single bank and set it to 0. May need to unlock first (DPaint locks on exit)
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IO_Write(0x3ce, 0x0f);
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Bitu oldlock = IO_Read(0x3cf);
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IO_Write(0x3cf, 0x05);
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IO_Write(0x3ce, 0x09);
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IO_Write(0x3cf, 0x00);
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IO_Write(0x3ce, 0x0a);
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IO_Write(0x3cf, 0x00);
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IO_Write(0x3ce, 0x0b);
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Bit8u val = IO_Read(0x3cf);
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IO_Write(0x3cf, val & ~0x08);
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IO_Write(0x3ce, 0x0c);
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IO_Write(0x3cf, 0x00);
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IO_Write(0x3ce, 0x0d);
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IO_Write(0x3cf, 0x00);
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IO_Write(0x3ce, 0x0e);
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IO_Write(0x3cf, 0x00);
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IO_Write(0x3ce, 0x0f);
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IO_Write(0x3cf, oldlock);
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if (svga.determine_mode)
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svga.determine_mode();
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if(vga.mode != M_VGA) {
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vga.config.compatible_chain4 = false;
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vga.vmemwrap = vga.vmemsize;
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} else {
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vga.config.compatible_chain4 = true;
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vga.vmemwrap = 256*1024;
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}
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VGA_SetupHandlers();
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}
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void DetermineMode_PVGA1A() {
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// Close replica from the base implementation. It will stay here
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// until I figure a way to either distinguish M_VGA and M_LIN8 or
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// merge them.
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if (vga.attr.mode_control & 1) {
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if (vga.gfx.mode & 0x40) VGA_SetMode((pvga1a.biosMode<=0x13)?M_VGA:M_LIN8);
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else if (vga.gfx.mode & 0x20) VGA_SetMode(M_CGA4);
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else if ((vga.gfx.miscellaneous & 0x0c)==0x0c) VGA_SetMode(M_CGA2);
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else VGA_SetMode((pvga1a.biosMode<=0x13)?M_EGA:M_LIN4);
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} else {
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VGA_SetMode(M_TEXT);
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}
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}
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void SetClock_PVGA1A(Bitu which,Bitu target) {
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if (which < 4) {
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pvga1a.clockFreq[which]=1000*target;
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VGA_StartResize();
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}
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}
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Bitu GetClock_PVGA1A() {
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return pvga1a.clockFreq[(vga.misc_output >> 2) & 3];
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}
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bool AcceptsMode_PVGA1A(Bitu mode) {
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return VideoModeMemSize(mode) < vga.vmemsize;
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}
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void SVGA_Setup_ParadisePVGA1A(void) {
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svga.write_p3cf = &write_p3cf_pvga1a;
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svga.read_p3cf = &read_p3cf_pvga1a;
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svga.set_video_mode = &FinishSetMode_PVGA1A;
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svga.determine_mode = &DetermineMode_PVGA1A;
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svga.set_clock = &SetClock_PVGA1A;
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svga.get_clock = &GetClock_PVGA1A;
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svga.accepts_mode = &AcceptsMode_PVGA1A;
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VGA_SetClock(0,CLK_25);
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VGA_SetClock(1,CLK_28);
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VGA_SetClock(2,32400); // could not find documentation
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VGA_SetClock(3,35900);
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// Adjust memory, default to 512K
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if (vga.vmemsize == 0)
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vga.vmemsize = 512*1024;
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if (vga.vmemsize < 512*1024) {
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vga.vmemsize = 256*1024;
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pvga1a.PR1 = 1<<6;
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} else if (vga.vmemsize > 512*1024) {
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vga.vmemsize = 1024*1024;
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pvga1a.PR1 = 3<<6;
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} else {
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pvga1a.PR1 = 2<<6;
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}
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// Paradise ROM signature
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PhysPt rom_base=PhysMake(0xc000,0);
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phys_writeb(rom_base+0x007d,'V');
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phys_writeb(rom_base+0x007e,'G');
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phys_writeb(rom_base+0x007f,'A');
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phys_writeb(rom_base+0x0080,'=');
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IO_Write(0x3cf, 0x05); // Enable!
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}
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