mirror of
https://github.com/retro100/dosbox-wii.git
synced 2024-07-01 00:26:19 +02:00
343 lines
9.6 KiB
C++
343 lines
9.6 KiB
C++
/*
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* Copyright (C) 2002-2007 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: paging.h,v 1.24 2007/01/08 19:45:37 qbix79 Exp $ */
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#ifndef DOSBOX_PAGING_H
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#define DOSBOX_PAGING_H
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#ifndef DOSBOX_DOSBOX_H
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#include "dosbox.h"
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#endif
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#ifndef DOSBOX_MEM_H
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#include "mem.h"
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#endif
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class PageDirectory;
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#define MEM_PAGE_SIZE (4096)
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#define XMS_START (0x110)
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#define TLB_SIZE (1024*1024)
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#define PFLAG_READABLE 0x1
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#define PFLAG_WRITEABLE 0x2
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#define PFLAG_HASROM 0x4
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#define PFLAG_HASCODE 0x8 //Page contains dynamic code
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#define PFLAG_NOCODE 0x10 //No dynamic code can be generated here
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#define PFLAG_INIT 0x20 //No dynamic code can be generated here
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#define LINK_START ((1024+64)/4) //Start right after the HMA
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//Allow 128 mb of memory to be linked
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#define PAGING_LINKS (128*1024/4)
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class PageHandler {
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public:
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virtual ~PageHandler(void) { }
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virtual Bitu readb(PhysPt addr);
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virtual Bitu readw(PhysPt addr);
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virtual Bitu readd(PhysPt addr);
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virtual void writeb(PhysPt addr,Bitu val);
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virtual void writew(PhysPt addr,Bitu val);
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virtual void writed(PhysPt addr,Bitu val);
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virtual HostPt GetHostReadPt(Bitu phys_page);
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virtual HostPt GetHostWritePt(Bitu phys_page);
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virtual bool readb_checked(PhysPt addr, Bitu * val);
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virtual bool readw_checked(PhysPt addr, Bitu * val);
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virtual bool readd_checked(PhysPt addr, Bitu * val);
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virtual bool writeb_checked(PhysPt addr,Bitu val);
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virtual bool writew_checked(PhysPt addr,Bitu val);
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virtual bool writed_checked(PhysPt addr,Bitu val);
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Bitu flags;
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};
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/* Some other functions */
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void PAGING_Enable(bool enabled);
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bool PAGING_Enabled(void);
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Bitu PAGING_GetDirBase(void);
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void PAGING_SetDirBase(Bitu cr3);
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void PAGING_InitTLB(void);
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void PAGING_ClearTLB(void);
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void PAGING_LinkPage(Bitu lin_page,Bitu phys_page);
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void PAGING_UnlinkPages(Bitu lin_page,Bitu pages);
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/* This maps the page directly, only use when paging is disabled */
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void PAGING_MapPage(Bitu lin_page,Bitu phys_page);
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bool PAGING_MakePhysPage(Bitu & page);
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void MEM_SetLFB( Bitu page, Bitu pages, PageHandler *handler);
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void MEM_SetPageHandler(Bitu phys_page, Bitu pages, PageHandler * handler);
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void MEM_ResetPageHandler(Bitu phys_page, Bitu pages);
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#ifdef _MSC_VER
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#pragma pack (1)
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#endif
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struct X86_PageEntryBlock{
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#ifdef WORDS_BIGENDIAN
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Bit32u base:20;
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Bit32u avl:3;
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Bit32u g:1;
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Bit32u pat:1;
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Bit32u d:1;
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Bit32u a:1;
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Bit32u pcd:1;
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Bit32u pwt:1;
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Bit32u us:1;
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Bit32u wr:1;
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Bit32u p:1;
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#else
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Bit32u p:1;
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Bit32u wr:1;
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Bit32u us:1;
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Bit32u pwt:1;
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Bit32u pcd:1;
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Bit32u a:1;
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Bit32u d:1;
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Bit32u pat:1;
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Bit32u g:1;
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Bit32u avl:3;
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Bit32u base:20;
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#endif
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} GCC_ATTRIBUTE(packed);
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#ifdef _MSC_VER
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#pragma pack ()
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#endif
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union X86PageEntry {
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Bit32u load;
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X86_PageEntryBlock block;
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};
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struct PagingBlock {
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Bitu cr3;
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Bitu cr2;
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struct {
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Bitu page;
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PhysPt addr;
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} base;
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struct {
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HostPt read[TLB_SIZE];
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HostPt write[TLB_SIZE];
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PageHandler * handler[TLB_SIZE];
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Bit32u phys_page[TLB_SIZE];
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} tlb;
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struct {
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Bitu used;
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Bit32u entries[PAGING_LINKS];
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} links;
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Bit32u firstmb[LINK_START];
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bool enabled;
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};
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extern PagingBlock paging;
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/* Some support functions */
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PageHandler * MEM_GetPageHandler(Bitu phys_page);
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/* Use this helper function to access linear addresses in readX/writeX functions */
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INLINE PhysPt PAGING_GetPhysicalPage(PhysPt linePage) {
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return (paging.tlb.phys_page[linePage>>12]<<12);
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}
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INLINE PhysPt PAGING_GetPhysicalAddress(PhysPt linAddr) {
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return (paging.tlb.phys_page[linAddr>>12]<<12)|(linAddr&0xfff);
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}
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/* Unaligned address handlers */
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Bit16u mem_unalignedreadw(PhysPt address);
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Bit32u mem_unalignedreadd(PhysPt address);
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void mem_unalignedwritew(PhysPt address,Bit16u val);
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void mem_unalignedwrited(PhysPt address,Bit32u val);
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bool mem_unalignedreadw_checked_x86(PhysPt address,Bit16u * val);
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bool mem_unalignedreadd_checked_x86(PhysPt address,Bit32u * val);
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bool mem_unalignedwritew_checked_x86(PhysPt address,Bit16u val);
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bool mem_unalignedwrited_checked_x86(PhysPt address,Bit32u val);
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/* Special inlined memory reading/writing */
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INLINE Bit8u mem_readb_inline(PhysPt address) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readb(paging.tlb.read[index]+address);
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else return paging.tlb.handler[index]->readb(address);
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}
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INLINE Bit16u mem_readw_inline(PhysPt address) {
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if (!(address & 1)) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readw(paging.tlb.read[index]+address);
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else return paging.tlb.handler[index]->readw(address);
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} else return mem_unalignedreadw(address);
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}
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INLINE Bit32u mem_readd_inline(PhysPt address) {
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if (!(address & 3)) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readd(paging.tlb.read[index]+address);
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else return paging.tlb.handler[index]->readd(address);
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} else return mem_unalignedreadd(address);
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}
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INLINE void mem_writeb_inline(PhysPt address,Bit8u val) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writeb(paging.tlb.write[index]+address,val);
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else paging.tlb.handler[index]->writeb(address,val);
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}
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INLINE void mem_writew_inline(PhysPt address,Bit16u val) {
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if (!(address & 1)) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writew(paging.tlb.write[index]+address,val);
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else paging.tlb.handler[index]->writew(address,val);
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} else mem_unalignedwritew(address,val);
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}
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INLINE void mem_writed_inline(PhysPt address,Bit32u val) {
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if (!(address & 3)) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writed(paging.tlb.write[index]+address,val);
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else paging.tlb.handler[index]->writed(address,val);
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} else mem_unalignedwrited(address,val);
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}
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INLINE Bit16u mem_readw_dyncorex86(PhysPt address) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readw(paging.tlb.read[index]+address);
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else return paging.tlb.handler[index]->readw(address);
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} else return mem_unalignedreadw(address);
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}
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INLINE Bit32u mem_readd_dyncorex86(PhysPt address) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readd(paging.tlb.read[index]+address);
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else return paging.tlb.handler[index]->readd(address);
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} else return mem_unalignedreadd(address);
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}
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INLINE void mem_writew_dyncorex86(PhysPt address,Bit16u val) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writew(paging.tlb.write[index]+address,val);
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else paging.tlb.handler[index]->writew(address,val);
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} else mem_unalignedwritew(address,val);
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}
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INLINE void mem_writed_dyncorex86(PhysPt address,Bit32u val) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writed(paging.tlb.write[index]+address,val);
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else paging.tlb.handler[index]->writed(address,val);
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} else mem_unalignedwrited(address,val);
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}
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INLINE bool mem_readb_checked_x86(PhysPt address, Bit8u * val) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) {
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*val=host_readb(paging.tlb.read[index]+address);
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return false;
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} else {
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Bitu uval;
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bool retval;
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retval=paging.tlb.handler[index]->readb_checked(address, &uval);
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*val=(Bit8u)uval;
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return retval;
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}
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}
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INLINE bool mem_readw_checked_x86(PhysPt address, Bit16u * val) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) {
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*val=host_readw(paging.tlb.read[index]+address);
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return false;
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} else {
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Bitu uval;
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bool retval;
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retval=paging.tlb.handler[index]->readw_checked(address, &uval);
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*val=(Bit16u)uval;
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return retval;
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}
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} else return mem_unalignedreadw_checked_x86(address, val);
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}
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INLINE bool mem_readd_checked_x86(PhysPt address, Bit32u * val) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) {
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*val=host_readd(paging.tlb.read[index]+address);
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return false;
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} else {
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Bitu uval;
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bool retval;
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retval=paging.tlb.handler[index]->readd_checked(address, &uval);
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*val=(Bit32u)uval;
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return retval;
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}
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} else return mem_unalignedreadd_checked_x86(address, val);
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}
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INLINE bool mem_writeb_checked_x86(PhysPt address,Bit8u val) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) {
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host_writeb(paging.tlb.write[index]+address,val);
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return false;
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} else return paging.tlb.handler[index]->writeb_checked(address,val);
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}
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INLINE bool mem_writew_checked_x86(PhysPt address,Bit16u val) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) {
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host_writew(paging.tlb.write[index]+address,val);
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return false;
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} else return paging.tlb.handler[index]->writew_checked(address,val);
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} else return mem_unalignedwritew_checked_x86(address,val);
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}
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INLINE bool mem_writed_checked_x86(PhysPt address,Bit32u val) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) {
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host_writed(paging.tlb.write[index]+address,val);
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return false;
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} else return paging.tlb.handler[index]->writed_checked(address,val);
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} else return mem_unalignedwrited_checked_x86(address,val);
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}
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#endif
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