mirror of
https://github.com/retro100/dosbox-wii.git
synced 2024-11-17 15:49:15 +01:00
206 lines
6.6 KiB
C++
206 lines
6.6 KiB
C++
/*
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* Copyright (C) 2002-2007 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include "dosbox.h"
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#include "inout.h"
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#include "vga.h"
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#define attr(blah) vga.attr.blah
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void VGA_ATTR_SetPalette(Bit8u index,Bit8u val) {
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vga.attr.palette[index] = val;
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if (vga.attr.mode_control & 0x80) val = (val&0xf) | (vga.attr.color_select << 4);
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val &= 63;
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val |= (vga.attr.color_select & 0xc) << 4;
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VGA_DAC_CombineColor(index,val);
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}
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Bitu read_p3c0(Bitu port,Bitu iolen) {
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//Wcharts
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return 0x0;
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}
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void write_p3c0(Bitu port,Bitu val,Bitu iolen) {
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if (!vga.internal.attrindex) {
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attr(index)=val & 0x1F;
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vga.internal.attrindex=true;
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attr(enabled)=val & 0x20;
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/*
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0-4 Address of data register to write to port 3C0h or read from port 3C1h
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5 If set screen output is enabled and the palette can not be modified,
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if clear screen output is disabled and the palette can be modified.
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*/
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return;
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} else {
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vga.internal.attrindex=false;
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switch (attr(index)) {
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/* Palette */
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case 0x00: case 0x01: case 0x02: case 0x03:
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case 0x04: case 0x05: case 0x06: case 0x07:
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case 0x08: case 0x09: case 0x0a: case 0x0b:
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case 0x0c: case 0x0d: case 0x0e: case 0x0f:
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if (!attr(enabled)) VGA_ATTR_SetPalette(attr(index),val);
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/*
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0-5 Index into the 256 color DAC table. May be modified by 3C0h index
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10h and 14h.
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*/
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break;
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case 0x10: /* Mode Control Register */
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if ((attr(mode_control) ^ val) & 0x80) {
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attr(mode_control)^=0x80;
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for (Bitu i=0;i<0x10;i++) {
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VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
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}
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}
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if ((attr(mode_control) ^ val) & 0x08) {
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VGA_SetBlinking(val & 0x8);
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}
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/*
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Special hacks for games programming registers themselves,
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Doesn't work if they program EGA16 themselves,
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but haven't encountered that yet
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*/
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attr(mode_control)=val;
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VGA_DetermineMode();
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//TODO 9 bit characters
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/*
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0 Graphics mode if set, Alphanumeric mode else.
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1 Monochrome mode if set, color mode else.
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2 9-bit wide characters if set.
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The 9th bit of characters C0h-DFh will be the same as
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the 8th bit. Otherwise it will be the background color.
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3 If set Attribute bit 7 is blinking, else high intensity.
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5 If set the PEL panning register (3C0h index 13h) is temporarily set
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to 0 from when the line compare causes a wrap around until the next
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vertical retrace when the register is automatically reloaded with
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the old value, else the PEL panning register ignores line compares.
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6 If set pixels are 8 bits wide. Used in 256 color modes.
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7 If set bit 4-5 of the index into the DAC table are taken from port
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3C0h index 14h bit 0-1, else the bits in the palette register are
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used.
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*/
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break;
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case 0x11: /* Overscan Color Register */
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attr(overscan_color)=val;
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/* 0-5 Color of screen border. Color is defined as in the palette registers. */
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break;
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case 0x12: /* Color Plane Enable Register */
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/* Why disable colour planes? */
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attr(color_plane_enable)=val;
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/*
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0 Bit plane 0 is enabled if set.
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1 Bit plane 1 is enabled if set.
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2 Bit plane 2 is enabled if set.
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3 Bit plane 3 is enabled if set.
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4-5 Video Status MUX. Diagnostics use only.
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Two attribute bits appear on bits 4 and 5 of the Input Status
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Register 1 (3dAh). 0: Bit 2/0, 1: Bit 5/4, 2: bit 3/1, 3: bit 7/6
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*/
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break;
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case 0x13: /* Horizontal PEL Panning Register */
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attr(horizontal_pel_panning)=val & 0xF;
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switch (vga.mode) {
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case M_TEXT:
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if (val==0x7) vga.config.pel_panning=7;
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if (val>0x7) vga.config.pel_panning=0;
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else vga.config.pel_panning=val+1;
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break;
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case M_VGA:
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case M_LIN8:
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vga.config.pel_panning=(val & 0x7)/2;
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break;
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case M_LIN16:
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default:
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vga.config.pel_panning=(val & 0x7);
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}
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/*
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0-3 Indicates number of pixels to shift the display left
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Value 9bit textmode 256color mode Other modes
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0 1 0 0
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1 2 n/a 1
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2 3 1 2
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3 4 n/a 3
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4 5 2 4
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5 6 n/a 5
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6 7 3 6
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7 8 n/a 7
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8 0 n/a n/a
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*/
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break;
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case 0x14: /* Color Select Register */
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if (attr(color_select) ^ val) {
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attr(color_select)=val;
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for (Bitu i=0;i<0x10;i++) {
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VGA_ATTR_SetPalette(i,vga.attr.palette[i]);
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}
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}
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/*
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0-1 If 3C0h index 10h bit 7 is set these 2 bits are used as bits 4-5 of
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the index into the DAC table.
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2-3 These 2 bits are used as bit 6-7 of the index into the DAC table
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except in 256 color mode.
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Note: this register does not affect 256 color modes.
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*/
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break;
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default:
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LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Write to unkown Index %2X",attr(index));
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break;
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}
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}
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}
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Bitu read_p3c1(Bitu port,Bitu iolen) {
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// vga.internal.attrindex=false;
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switch (attr(index)) {
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/* Palette */
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case 0x00: case 0x01: case 0x02: case 0x03:
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case 0x04: case 0x05: case 0x06: case 0x07:
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case 0x08: case 0x09: case 0x0a: case 0x0b:
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case 0x0c: case 0x0d: case 0x0e: case 0x0f:
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return attr(palette[attr(index)]);
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case 0x10: /* Mode Control Register */
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return attr(mode_control);
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case 0x11: /* Overscan Color Register */
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return attr(overscan_color);
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case 0x12: /* Color Plane Enable Register */
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return attr(color_plane_enable);
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case 0x13: /* Horizontal PEL Panning Register */
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return attr(horizontal_pel_panning);
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case 0x14: /* Color Select Register */
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return attr(color_select);
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default:
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LOG(LOG_VGAMISC,LOG_NORMAL)("VGA:ATTR:Read from unkown Index %2X",attr(index));
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}
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return 0;
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};
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void VGA_SetupAttr(void) {
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if (machine==MCH_VGA) {
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IO_RegisterReadHandler(0x3c0,read_p3c0,IO_MB);
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IO_RegisterWriteHandler(0x3c0,write_p3c0,IO_MB);
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IO_RegisterReadHandler(0x3c1,read_p3c1,IO_MB);
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}
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}
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