mirror of
https://github.com/dborth/fceugx.git
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101 lines
3.3 KiB
C
101 lines
3.3 KiB
C
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typedef struct {
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/* Set by mapper/board code: */
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void (*Power)(void);
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void (*Reset)(void);
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void (*Close)(void);
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uint8 *SaveGame[4]; /* Pointers to memory to save/load. */
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uint32 SaveGameLen[4]; /* How much memory to save/load. */
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/* Set by iNES/UNIF loading code. */
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int mirror; /* As set in the header or chunk.
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iNES/UNIF specific. Intended
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to help support games like "Karnov"
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that are not really MMC3 but are
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set to mapper 4.
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*/
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int battery; /* Presence of an actual battery. */
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uint8 MD5[16];
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uint32 CRC32; /* Should be set by the iNES/UNIF loading
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code, used by mapper/board code, maybe
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other code in the future.
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*/
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} CartInfo;
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void FCEU_SaveGameSave(CartInfo *LocalHWInfo);
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void FCEU_LoadGameSave(CartInfo *LocalHWInfo);
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extern uint8 *Page[32],*VPage[8],*MMC5SPRVPage[8],*MMC5BGVPage[8];
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void ResetCartMapping(void);
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void SetupCartPRGMapping(int chip, uint8 *p, uint32 size, int ram);
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void SetupCartCHRMapping(int chip, uint8 *p, uint32 size, int ram);
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void SetupCartMirroring(int m, int hard, uint8 *extra);
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DECLFR(CartBROB);
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DECLFR(CartBR);
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DECLFW(CartBW);
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extern uint8 *PRGptr[32];
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extern uint8 *CHRptr[32];
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extern uint32 PRGsize[32];
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extern uint32 CHRsize[32];
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extern uint32 PRGmask2[32];
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extern uint32 PRGmask4[32];
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extern uint32 PRGmask8[32];
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extern uint32 PRGmask16[32];
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extern uint32 PRGmask32[32];
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extern uint32 CHRmask1[32];
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extern uint32 CHRmask2[32];
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extern uint32 CHRmask4[32];
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extern uint32 CHRmask8[32];
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void FASTAPASS(2) setprg2(uint32 A, uint32 V);
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void FASTAPASS(2) setprg4(uint32 A, uint32 V);
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void FASTAPASS(2) setprg8(uint32 A, uint32 V);
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void FASTAPASS(2) setprg16(uint32 A, uint32 V);
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void FASTAPASS(2) setprg32(uint32 A, uint32 V);
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void FASTAPASS(3) setprg2r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(3) setprg4r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(3) setprg8r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(3) setprg16r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(3) setprg32r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(3) setchr1r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(3) setchr2r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(3) setchr4r(int r, unsigned int A, unsigned int V);
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void FASTAPASS(2) setchr8r(int r, unsigned int V);
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void FASTAPASS(2) setchr1(unsigned int A, unsigned int V);
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void FASTAPASS(2) setchr2(unsigned int A, unsigned int V);
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void FASTAPASS(2) setchr4(unsigned int A, unsigned int V);
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void FASTAPASS(1) setchr8(unsigned int V);
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void FASTAPASS(2) setvram4(uint32 A, uint8 *p);
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void FASTAPASS(1) setvram8(uint8 *p);
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void FASTAPASS(3) setvramb1(uint8 *p, uint32 A, uint32 b);
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void FASTAPASS(3) setvramb2(uint8 *p, uint32 A, uint32 b);
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void FASTAPASS(3) setvramb4(uint8 *p, uint32 A, uint32 b);
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void FASTAPASS(2) setvramb8(uint8 *p, uint32 b);
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void FASTAPASS(1) setmirror(int t);
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void setmirrorw(int a, int b, int c, int d);
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void FASTAPASS(3) setntamem(uint8 *p, int ram, uint32 b);
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#define MI_H 0
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#define MI_V 1
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#define MI_0 2
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#define MI_1 3
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extern int geniestage;
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void GeniePower(void);
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void OpenGenie(void);
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void CloseGenie(void);
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void FCEU_KillGenie(void);
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