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fix timing error (incorrect opcode)

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This commit is contained in:
dborth 2008-10-16 05:06:40 +00:00
parent d89b6acf07
commit 16e97e0da1
1 changed files with 27 additions and 27 deletions
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54
source/fceultra/x6502.c
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@ -74,7 +74,7 @@ static INLINE uint8 RdMemHook(unsigned int A)
else else
return(_DB=ARead[A](A)); return(_DB=ARead[A](A));
} }
static INLINE void WrMemHook(unsigned int A, uint8 V) static INLINE void WrMemHook(unsigned int A, uint8 V)
{ {
if(X.WriteHook) if(X.WriteHook)
@ -113,7 +113,7 @@ void FASTAPASS(2) X6502_DMW(uint32 A, uint8 V)
uint8 VTMP=V; \ uint8 VTMP=V; \
WrRAM(0x100+_S,VTMP); \ WrRAM(0x100+_S,VTMP); \
_S--; \ _S--; \
} }
#define POP() RdRAM(0x100+(++_S)) #define POP() RdRAM(0x100+(++_S))
@ -215,7 +215,7 @@ static uint8 ZNTable[256];
_P|=l; \ _P|=l; \
X_ZNT(x); \ X_ZNT(x); \
} }
/* Icky icky thing for some undocumented instructions. Can easily be /* Icky icky thing for some undocumented instructions. Can easily be
broken if names of local variables are changed. broken if names of local variables are changed.
*/ */
@ -354,7 +354,7 @@ static uint8 ZNTable[256];
#define ST_IY(r) {unsigned int A; GetIYWR(A); WrMem(A,r); break; } #define ST_IY(r) {unsigned int A; GetIYWR(A); WrMem(A,r); break; }
static uint8 CycTable[256] = static uint8 CycTable[256] =
{ {
/*0x00*/ 7,6,2,8,3,3,5,5,3,2,2,2,4,4,6,6, /*0x00*/ 7,6,2,8,3,3,5,5,3,2,2,2,4,4,6,6,
/*0x10*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7, /*0x10*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
/*0x20*/ 6,6,2,8,3,3,5,5,4,2,2,2,4,4,6,6, /*0x20*/ 6,6,2,8,3,3,5,5,4,2,2,2,4,4,6,6,
@ -369,7 +369,7 @@ static uint8 CycTable[256] =
/*0xB0*/ 2,5,2,5,4,4,4,4,2,4,2,4,4,4,4,4, /*0xB0*/ 2,5,2,5,4,4,4,4,2,4,2,4,4,4,4,4,
/*0xC0*/ 2,6,2,8,3,3,5,5,2,2,2,2,4,4,6,6, /*0xC0*/ 2,6,2,8,3,3,5,5,2,2,2,2,4,4,6,6,
/*0xD0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7, /*0xD0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
/*0xE0*/ 2,6,3,8,3,3,5,5,2,2,2,2,4,4,6,6, /*0xE0*/ 2,6,2,8,3,3,5,5,2,2,2,2,4,4,6,6,
/*0xF0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7, /*0xF0*/ 2,5,2,8,4,4,6,6,2,4,2,7,4,4,7,7,
}; };
@ -389,7 +389,7 @@ void TriggerNMI(void)
} }
void TriggerNMI2(void) void TriggerNMI2(void)
{ {
_IRQlow|=FCEU_IQNMI2; _IRQlow|=FCEU_IQNMI2;
} }
@ -408,7 +408,7 @@ void X6502_Reset(void)
{ {
_IRQlow=FCEU_IQRESET; _IRQlow=FCEU_IQRESET;
} }
void FCEUI_GetIVectors(uint16 *reset, uint16 *irq, uint16 *nmi) void FCEUI_GetIVectors(uint16 *reset, uint16 *irq, uint16 *nmi)
{ {
fceuindbg=1; fceuindbg=1;
@ -453,16 +453,16 @@ static void X6502_RunDebug(int32 cycles)
cycles*=15; // 15*4=60 cycles*=15; // 15*4=60
else else
cycles*=16; // 16*4=64 cycles*=16; // 16*4=64
_count+=cycles; _count+=cycles;
while(_count>0) while(_count>0)
{ {
int32 temp; int32 temp;
uint8 b1; uint8 b1;
if(_IRQlow) if(_IRQlow)
{ {
if(_IRQlow&FCEU_IQRESET) if(_IRQlow&FCEU_IQRESET)
{ {
_PC=RdMem(0xFFFC); _PC=RdMem(0xFFFC);
@ -473,7 +473,7 @@ static void X6502_RunDebug(int32 cycles)
} }
else if(_IRQlow&FCEU_IQNMI2) else if(_IRQlow&FCEU_IQNMI2)
{ {
_IRQlow&=~FCEU_IQNMI2; _IRQlow&=~FCEU_IQNMI2;
_IRQlow|=FCEU_IQNMI; _IRQlow|=FCEU_IQNMI;
} }
else if(_IRQlow&FCEU_IQNMI) else if(_IRQlow&FCEU_IQNMI)
@ -484,14 +484,14 @@ static void X6502_RunDebug(int32 cycles)
PUSH(_PC>>8); PUSH(_PC>>8);
PUSH(_PC); PUSH(_PC);
PUSH((_P&~B_FLAG)|(U_FLAG)); PUSH((_P&~B_FLAG)|(U_FLAG));
_P|=I_FLAG; _P|=I_FLAG;
_PC=RdMem(0xFFFA); _PC=RdMem(0xFFFA);
_PC|=RdMem(0xFFFB)<<8; _PC|=RdMem(0xFFFB)<<8;
_IRQlow&=~FCEU_IQNMI; _IRQlow&=~FCEU_IQNMI;
} }
} }
else else
{ {
if(!(_PI&I_FLAG) && !_jammed) if(!(_PI&I_FLAG) && !_jammed)
{ {
ADDCYC(7); ADDCYC(7);
@ -504,7 +504,7 @@ static void X6502_RunDebug(int32 cycles)
} }
} }
_IRQlow&=~(FCEU_IQTEMP); _IRQlow&=~(FCEU_IQTEMP);
if(_count<=0) if(_count<=0)
{ {
_PI=_P; _PI=_P;
return; return;
@ -525,9 +525,9 @@ static void X6502_RunDebug(int32 cycles)
b1=RdMem(_PC); b1=RdMem(_PC);
_PC++; _PC++;
switch(b1) switch(b1)
{ {
#include "ops.h" #include "ops.h"
} }
timestamp=tsave; timestamp=tsave;
@ -555,7 +555,7 @@ static void X6502_RunDebug(int32 cycles)
switch(b1) switch(b1)
{ {
#include "ops.h" #include "ops.h"
} }
} }
#undef RdRAM #undef RdRAM
#undef WrRAM #undef WrRAM
@ -589,7 +589,7 @@ static void X6502_RunNormal(int32 cycles)
cycles*=16; // 16*4=64 cycles*=16; // 16*4=64
_count+=cycles; _count+=cycles;
while(_count>0) while(_count>0)
{ {
int32 temp; int32 temp;
@ -608,7 +608,7 @@ static void X6502_RunNormal(int32 cycles)
} }
else if(_IRQlow&FCEU_IQNMI2) else if(_IRQlow&FCEU_IQNMI2)
{ {
_IRQlow&=~FCEU_IQNMI2; _IRQlow&=~FCEU_IQNMI2;
_IRQlow|=FCEU_IQNMI; _IRQlow|=FCEU_IQNMI;
} }
else if(_IRQlow&FCEU_IQNMI) else if(_IRQlow&FCEU_IQNMI)
@ -619,14 +619,14 @@ static void X6502_RunNormal(int32 cycles)
PUSH(_PC>>8); PUSH(_PC>>8);
PUSH(_PC); PUSH(_PC);
PUSH((_P&~B_FLAG)|(U_FLAG)); PUSH((_P&~B_FLAG)|(U_FLAG));
_P|=I_FLAG; _P|=I_FLAG;
_PC=RdMem(0xFFFA); _PC=RdMem(0xFFFA);
_PC|=RdMem(0xFFFB)<<8; _PC|=RdMem(0xFFFB)<<8;
_IRQlow&=~FCEU_IQNMI; _IRQlow&=~FCEU_IQNMI;
} }
} }
else else
{ {
if(!(_PI&I_FLAG) && !_jammed) if(!(_PI&I_FLAG) && !_jammed)
{ {
ADDCYC(7); ADDCYC(7);
@ -639,7 +639,7 @@ static void X6502_RunNormal(int32 cycles)
} }
} }
_IRQlow&=~(FCEU_IQTEMP); _IRQlow&=~(FCEU_IQTEMP);
if(_count<=0) if(_count<=0)
{ {
_PI=_P; _PI=_P;
X.PC=pbackus; X.PC=pbackus;
@ -665,7 +665,7 @@ static void X6502_RunNormal(int32 cycles)
switch(b1) switch(b1)
{ {
#include "ops.h" #include "ops.h"
} }
} }
#undef _PC #undef _PC