mirror of
https://github.com/dborth/fceugx.git
synced 2024-11-01 15:05:05 +01:00
135 lines
3.5 KiB
C++
135 lines
3.5 KiB
C++
/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2009 CaH4e3
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "mapinc.h"
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static uint8 creg[8], preg[2];
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static int32 IRQa, IRQCount, IRQClock, IRQLatch;
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static uint8 *WRAM = NULL;
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static uint32 WRAMSIZE;
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static uint8 *CHRRAM = NULL;
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static uint32 CHRRAMSIZE;
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static SFORMAT StateRegs[] =
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{
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{ creg, 8, "CREG" },
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{ preg, 2, "PREG" },
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{ &IRQa, 4, "IRQA" },
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{ &IRQCount, 4, "IRQC" },
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{ &IRQLatch, 4, "IRQL" },
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{ &IRQClock, 4, "IRQK" },
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{ 0 }
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};
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static void Sync(void) {
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uint8 i;
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setprg8r(0x10, 0x6000, 0);
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setprg8(0x8000, preg[0]);
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setprg8(0xa000, preg[1]);
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setprg8(0xc000, ~1);
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setprg8(0xe000, ~0);
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for (i = 0; i < 8; i++)
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if ((creg[i] == 6) || (creg[i] == 7))
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setchr1r(0x10, i << 10, creg[i] & 1);
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else
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setchr1(i << 10, creg[i]);
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}
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static DECLFW(M252Write) {
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if ((A >= 0xB000) && (A <= 0xEFFF)) {
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uint8 ind = ((((A & 8) | (A >> 8)) >> 3) + 2) & 7;
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uint8 sar = A & 4;
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creg[ind] = (creg[ind] & (0xF0 >> sar)) | ((V & 0x0F) << sar);
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Sync();
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} else
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switch (A & 0xF00C) {
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case 0x8000:
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case 0x8004:
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case 0x8008:
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case 0x800C: preg[0] = V; Sync(); break;
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case 0xA000:
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case 0xA004:
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case 0xA008:
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case 0xA00C: preg[1] = V; Sync(); break;
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case 0xF000: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0xF0; IRQLatch |= V & 0xF; break;
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case 0xF004: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0x0F; IRQLatch |= V << 4; break;
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case 0xF008: X6502_IRQEnd(FCEU_IQEXT); IRQClock = 0; IRQCount = IRQLatch; IRQa = V & 2; break;
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}
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}
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static void M252Power(void) {
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Sync();
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SetReadHandler(0x6000, 0x7FFF, CartBR);
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SetWriteHandler(0x6000, 0x7FFF, CartBW);
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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SetWriteHandler(0x8000, 0xFFFF, M252Write);
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}
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static void M252IRQ(int a) {
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#define LCYCS 341
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if (IRQa) {
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IRQClock += a * 3;
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if (IRQClock >= LCYCS) {
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while (IRQClock >= LCYCS) {
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IRQClock -= LCYCS;
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IRQCount++;
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if (IRQCount & 0x100) {
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X6502_IRQBegin(FCEU_IQEXT);
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IRQCount = IRQLatch;
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}
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}
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}
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}
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}
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static void M252Close(void) {
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if (WRAM)
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FCEU_gfree(WRAM);
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if (CHRRAM)
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FCEU_gfree(CHRRAM);
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WRAM = CHRRAM = NULL;
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}
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static void StateRestore(int version) {
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Sync();
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}
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void Mapper252_Init(CartInfo *info) {
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info->Power = M252Power;
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info->Close = M252Close;
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MapIRQHook = M252IRQ;
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CHRRAMSIZE = 2048;
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CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
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SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
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AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");
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WRAMSIZE = 8192;
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WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
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SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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if (info->battery) {
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info->SaveGame[0] = WRAM;
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info->SaveGameLen[0] = WRAMSIZE;
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}
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GameStateRestore = StateRestore;
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AddExState(&StateRegs, ~0, 0, 0);
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}
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