mirror of
https://github.com/dborth/fceugx.git
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93 lines
2.9 KiB
C++
93 lines
2.9 KiB
C++
/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2011 CaH4e3
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* FDS Conversion
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*
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*/
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#include "mapinc.h"
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static uint8 reg[8], mirror;
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static SFORMAT StateRegs[] =
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{
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{ reg, 8, "PRG" },
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{ &mirror, 1, "MIRR" },
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{ 0 }
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};
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static void Sync(void) {
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setprg2(0x6000, reg[4]);
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setprg2(0x6800, reg[5]);
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setprg2(0x7000, reg[6]);
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setprg2(0x7800, reg[7]);
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setprg2(0x8000, reg[0]);
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setprg2(0x8800, reg[1]);
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setprg2(0x9000, reg[2]);
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setprg2(0x9800, reg[3]);
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setprg8(0xA000, 0xd);
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setprg16(0xC000, 7);
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setchr8(0);
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setmirror(mirror);
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}
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static DECLFW(UNLKS7057Write) {
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switch (A & 0xF003) {
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case 0x8000:
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case 0x8001:
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case 0x8002:
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case 0x8003:
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case 0x9000:
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case 0x9001:
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case 0x9002:
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case 0x9003: mirror = V & 1; Sync(); break;
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case 0xB000: reg[0] = (reg[0] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xB001: reg[0] = (reg[0] & 0x0F) | (V << 4); Sync(); break;
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case 0xB002: reg[1] = (reg[1] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xB003: reg[1] = (reg[1] & 0x0F) | (V << 4); Sync(); break;
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case 0xC000: reg[2] = (reg[2] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xC001: reg[2] = (reg[2] & 0x0F) | (V << 4); Sync(); break;
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case 0xC002: reg[3] = (reg[3] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xC003: reg[3] = (reg[3] & 0x0F) | (V << 4); Sync(); break;
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case 0xD000: reg[4] = (reg[4] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xD001: reg[4] = (reg[4] & 0x0F) | (V << 4); Sync(); break;
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case 0xD002: reg[5] = (reg[5] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xD003: reg[5] = (reg[5] & 0x0F) | (V << 4); Sync(); break;
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case 0xE000: reg[6] = (reg[6] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xE001: reg[6] = (reg[6] & 0x0F) | (V << 4); Sync(); break;
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case 0xE002: reg[7] = (reg[7] & 0xF0) | (V & 0x0F); Sync(); break;
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case 0xE003: reg[7] = (reg[7] & 0x0F) | (V << 4); Sync(); break;
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}
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}
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static void UNLKS7057Power(void) {
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Sync();
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SetReadHandler(0x6000, 0xFFFF, CartBR);
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SetWriteHandler(0x8000, 0xFFFF, UNLKS7057Write);
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}
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static void UNLKS7057Reset(void) {
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Sync();
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}
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void UNLKS7057_Init(CartInfo *info) {
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info->Power = UNLKS7057Power;
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info->Reset = UNLKS7057Reset;
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AddExState(&StateRegs, ~0, 0, 0);
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}
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