mirror of
https://github.com/dborth/fceugx.git
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286 lines
7.7 KiB
C++
286 lines
7.7 KiB
C++
/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2014 CaitSith2
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Roms still using NES 1.0 format should be loaded as 32K CHR RAM.
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* Roms defined under NES 2.0 should use the VRAM size field, defining 7, 8 or 9, based on how much VRAM should be present.
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* UNIF doesn't have this problem, because unique board names can define this information.
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* The UNIF names are UNROM-512-8K, UNROM-512-16K and UNROM-512-32K
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*
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* The battery flag in the NES header enables flash, Mirrror mode 2 Enables MI_0 and MI_1 mode.
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* Known games to use this board are:
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* Battle Kid 2: Mountain of Torment (512K PRG, 8K CHR RAM, Horizontal Mirroring, Flash disabled)
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* Study Hall (128K PRG (in 512K flash chip), 8K CHR RAM, Horizontal Mirroring, Flash enabled)
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* Although Xmas 2013 uses a different board, where LEDs can be controlled (with writes to the $8000-BFFF space),
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* it otherwise functions identically.
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*/
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#include "mapinc.h"
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#include "../ines.h"
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static uint8 latche, latcheinit, bus_conflict, chrram_mask, software_id=false;
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static uint16 latcha;
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static uint8 *flashdata;
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static uint32 *flash_write_count;
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static uint8 *FlashPage[32];
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//static uint32 *FlashWriteCountPage[32];
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//static uint8 flashloaded = false;
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static uint8 flash_save=0, flash_state=0, flash_mode=0, flash_bank;
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static void (*WLSync)(void);
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static void (*WHSync)(void);
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static INLINE void setfpageptr(int s, uint32 A, uint8 *p) {
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uint32 AB = A >> 11;
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int x;
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if (p)
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for (x = (s >> 1) - 1; x >= 0; x--) {
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FlashPage[AB + x] = p - A;
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}
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else
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for (x = (s >> 1) - 1; x >= 0; x--) {
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FlashPage[AB + x] = 0;
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}
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}
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void setfprg16(uint32 A, uint32 V) {
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if (PRGsize[0] >= 16384) {
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V &= PRGmask16[0];
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setfpageptr(16, A, flashdata ? (&flashdata[V << 14]) : 0);
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} else {
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uint32 VA = V << 3;
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int x;
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for (x = 0; x < 8; x++)
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setfpageptr(2, A + (x << 11), flashdata ? (&flashdata[((VA + x) & PRGmask2[0]) << 11]) : 0);
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}
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}
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void inc_flash_write_count(uint8 bank, uint32 A)
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{
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flash_write_count[(bank*4) + ((A&0x3000)>>12)]++;
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if(!flash_write_count[(bank*4) + ((A&0x3000)>>12)])
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flash_write_count[(bank*4) + ((A&0x3000)>>12)]++;
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}
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uint32 GetFlashWriteCount(uint8 bank, uint32 A)
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{
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return flash_write_count[(bank*4) + ((A&0x3000)>>12)];
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}
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static void StateRestore(int version) {
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WHSync();
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}
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static DECLFW(UNROM512LLatchWrite)
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{
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latche = V;
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latcha = A;
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WLSync();
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}
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static DECLFW(UNROM512HLatchWrite)
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{
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if (bus_conflict)
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latche = (V == CartBR(A)) ? V : 0;
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else
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latche = V;
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latcha = A;
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WHSync();
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}
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static DECLFR(UNROM512LatchRead)
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{
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uint8 flash_id[3]={0xB5,0xB6,0xB7};
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if(software_id)
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{
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if(A&1)
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return flash_id[ROM_size>>4];
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else
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return 0xBF;
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}
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if(flash_save)
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{
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if(A < 0xC000)
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{
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if(GetFlashWriteCount(flash_bank,A))
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return FlashPage[A >> 11][A];
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}
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else
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{
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if(GetFlashWriteCount(ROM_size-1,A))
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return FlashPage[A >> 11][A];
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}
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}
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return Page[A >> 11][A];
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}
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static void UNROM512LatchPower(void) {
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latche = latcheinit;
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WHSync();
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SetReadHandler(0x8000, 0xFFFF, UNROM512LatchRead);
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if(!flash_save)
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SetWriteHandler(0x8000, 0xFFFF, UNROM512HLatchWrite);
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else
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{
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SetWriteHandler(0x8000,0xBFFF,UNROM512LLatchWrite);
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SetWriteHandler(0xC000,0xFFFF,UNROM512HLatchWrite);
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}
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}
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static void UNROM512LatchClose(void) {
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if(flash_write_count)
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FCEU_gfree(flash_write_count);
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if(flashdata)
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FCEU_gfree(flashdata);
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flash_write_count = NULL;
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flashdata = NULL;
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}
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static void UNROM512LSync() {
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int erase_a[5]={0x9555,0xAAAA,0x9555,0x9555,0xAAAA};
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int erase_d[5]={0xAA,0x55,0x80,0xAA,0x55};
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int erase_b[5]={1,0,1,1,0};
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if(flash_mode==0)
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{
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if((latcha == erase_a[flash_state]) && (latche == erase_d[flash_state]) && (flash_bank == erase_b[flash_state]))
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{
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flash_state++;
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if(flash_state == 5)
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{
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flash_mode=1;
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}
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}
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else if ((flash_state==2)&&(latcha==0x9555)&&(latche==0xA0)&&(flash_bank==1))
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{
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flash_state++;
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flash_mode=2;
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}
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else if ((flash_state==2)&&(latcha==0x9555)&&(latche==0x90)&&(flash_bank==1))
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{
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flash_state=0;
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software_id=true;
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}
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else
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{
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if(latche==0xF0)
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software_id=false;
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flash_state=0;
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}
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}
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else if(flash_mode==1) //Chip Erase or Sector Erase
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{
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if(latche==0x30)
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{
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inc_flash_write_count(flash_bank,latcha);
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memset(&FlashPage[(latcha & 0xF000) >> 11][latcha & 0xF000],0xFF,0x1000);
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}
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else if (latche==0x10)
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{
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for(uint32 i=0;i<(ROM_size*4);i++)
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inc_flash_write_count(i>>2,i<<12);
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memset(flashdata,0xFF,ROM_size*0x4000); //Erasing the rom chip as instructed. Crash rate calulated to be 99.9% :)
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}
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flash_state=0;
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flash_mode=0;
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}
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else if(flash_mode==2) //Byte Program
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{
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if(!GetFlashWriteCount(flash_bank,latcha))
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{
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inc_flash_write_count(flash_bank,latcha);
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memcpy(&FlashPage[(latcha & 0xF000) >> 11][latcha & 0xF000],&Page[(latcha & 0xF000)>>11][latcha & 0xF000],0x1000);
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}
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FlashPage[latcha>>11][latcha]&=latche;
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flash_state=0;
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flash_mode=0;
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}
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}
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static void UNROM512HSync()
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{
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flash_bank=latche&(ROM_size-1);
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setprg16(0x8000, flash_bank);
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setprg16(0xc000, ~0);
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setfprg16(0x8000, flash_bank);
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setfprg16(0xC000, ~0);
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setchr8r(0, (latche & chrram_mask) >> 5);
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setmirror(MI_0+(latche>>7));
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}
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void UNROM512_Init(CartInfo *info) {
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flash_state=0;
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flash_bank=0;
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flash_save=info->battery;
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if(info->vram_size == 8192)
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chrram_mask = 0;
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else if (info->vram_size == 16384)
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chrram_mask = 0x20;
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else
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chrram_mask = 0x60;
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int mirror = (head.ROM_type & 1) | ((head.ROM_type & 8) >> 2);
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switch (mirror)
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{
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case 0: // hard horizontal, internal
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SetupCartMirroring(MI_H, 1, NULL);
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break;
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case 1: // hard vertical, internal
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SetupCartMirroring(MI_V, 1, NULL);
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break;
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case 2: // switchable 1-screen, internal (flags: 4-screen + horizontal)
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SetupCartMirroring(MI_0, 0, NULL);
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break;
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case 3: // hard four screen, last 8k of 32k RAM (flags: 4-screen + vertical)
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SetupCartMirroring( 4, 1, VROM + (info->vram_size - 8192));
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break;
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}
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bus_conflict = !info->battery;
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latcheinit = 0;
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WLSync = UNROM512LSync;
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WHSync = UNROM512HSync;
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info->Power = UNROM512LatchPower;
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info->Close = UNROM512LatchClose;
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GameStateRestore = StateRestore;
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if(flash_save)
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{
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flashdata = (uint8*)FCEU_gmalloc(ROM_size*0x4000);
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flash_write_count = (uint32*)FCEU_gmalloc(ROM_size*4*sizeof(uint32));
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info->SaveGame[0] = (uint8*)flash_write_count;
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info->SaveGame[1] = flashdata;
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info->SaveGameLen[0] = ROM_size*4*sizeof(uint32);
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info->SaveGameLen[1] = ROM_size*0x4000;
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AddExState(flash_write_count,ROM_size*4*sizeof(uint32),0,"FLASH_WRITE_COUNT");
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AddExState(flashdata,ROM_size*0x4000,0,"FLASH_DATA");
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AddExState(&flash_state,1,0,"FLASH_STATE");
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AddExState(&flash_mode,1,0,"FLASH_MODE");
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AddExState(&flash_bank,1,0,"FLASH_BANK");
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AddExState(&latcha,2,0,"LATA");
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}
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AddExState(&latche, 1, 0, "LATC");
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AddExState(&bus_conflict, 1, 0, "BUSC");
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}
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