Warning fixes in CPU emulation

This commit is contained in:
simon.kagstrom 2010-02-08 18:16:38 +00:00
parent 33ac22c693
commit c5b7b8e539
4 changed files with 38 additions and 36 deletions

View File

@ -265,8 +265,8 @@ inline void MOS6502_1541::CountVIATimers(int cycles)
inline void MOS6502_1541::NewATNState(void) inline void MOS6502_1541::NewATNState(void)
{ {
uint8 byte = ~via1_prb & via1_ddrb; uint8 byte = ~via1_prb & via1_ddrb;
IECLines = (byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80 // DATA (incl. ATN acknowledge) IECLines = ((byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80) // DATA (incl. ATN acknowledge)
| (byte << 3) & 0x40; // CLK | ((byte << 3) & 0x40); // CLK
} }

View File

@ -211,10 +211,10 @@ inline uint8 MOS6502_1541::read_byte_io(uint16 adr)
if ((adr & 0xfc00) == 0x1800) // VIA 1 if ((adr & 0xfc00) == 0x1800) // VIA 1
switch (adr & 0xf) { switch (adr & 0xf) {
case 0: case 0:
return (via1_prb & 0x1a return ((via1_prb & 0x1a)
| ((IECLines & TheCIA2->IECLines) >> 7) // DATA | ((IECLines & TheCIA2->IECLines) >> 7) // DATA
| ((IECLines & TheCIA2->IECLines) >> 4) & 0x04 // CLK | (((IECLines & TheCIA2->IECLines) >> 4) & 0x04) // CLK
| (TheCIA2->IECLines << 3) & 0x80) ^ 0x85; // ATN | (((TheCIA2->IECLines << 3) & 0x80) ^ 0x85)); // ATN
case 1: case 1:
case 15: case 15:
return 0xff; // Keep 1541C ROMs happy (track 0 sensor) return 0xff; // Keep 1541C ROMs happy (track 0 sensor)
@ -254,9 +254,9 @@ inline uint8 MOS6502_1541::read_byte_io(uint16 adr)
switch (adr & 0xf) { switch (adr & 0xf) {
case 0: case 0:
if (the_job->SyncFound()) if (the_job->SyncFound())
return via2_prb & 0x7f | the_job->WPState(); return (via2_prb & 0x7f) | the_job->WPState();
else else
return via2_prb | 0x80 | the_job->WPState(); return (via2_prb | 0x80) | the_job->WPState();
case 1: case 1:
case 15: case 15:
return the_job->ReadGCRByte(); return the_job->ReadGCRByte();
@ -334,8 +334,8 @@ void MOS6502_1541::write_byte_io(uint16 adr, uint8 byte)
case 0: case 0:
via1_prb = byte; via1_prb = byte;
byte = ~via1_prb & via1_ddrb; byte = ~via1_prb & via1_ddrb;
IECLines = (byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80 IECLines = ((byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80)
| (byte << 3) & 0x40; | ((byte << 3) & 0x40);
break; break;
case 1: case 1:
case 15: case 15:
@ -344,29 +344,29 @@ void MOS6502_1541::write_byte_io(uint16 adr, uint8 byte)
case 2: case 2:
via1_ddrb = byte; via1_ddrb = byte;
byte &= ~via1_prb; byte &= ~via1_prb;
IECLines = (byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80 IECLines = ((byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80)
| (byte << 3) & 0x40; | ((byte << 3) & 0x40);
break; break;
case 3: case 3:
via1_ddra = byte; via1_ddra = byte;
break; break;
case 4: case 4:
case 6: case 6:
via1_t1l = via1_t1l & 0xff00 | byte; via1_t1l = (via1_t1l & 0xff00) | byte;
break; break;
case 5: case 5:
via1_t1l = via1_t1l & 0xff | (byte << 8); via1_t1l = (via1_t1l & 0xff) | (byte << 8);
via1_ifr &= 0xbf; via1_ifr &= 0xbf;
via1_t1c = via1_t1l; via1_t1c = via1_t1l;
break; break;
case 7: case 7:
via1_t1l = via1_t1l & 0xff | (byte << 8); via1_t1l = (via1_t1l & 0xff) | (byte << 8);
break; break;
case 8: case 8:
via1_t2l = via1_t2l & 0xff00 | byte; via1_t2l = (via1_t2l & 0xff00) | byte;
break; break;
case 9: case 9:
via1_t2l = via1_t2l & 0xff | (byte << 8); via1_t2l = (via1_t2l & 0xff) | (byte << 8);
via1_ifr &= 0xdf; via1_ifr &= 0xdf;
via1_t2c = via1_t2l; via1_t2c = via1_t2l;
break; break;
@ -396,10 +396,12 @@ void MOS6502_1541::write_byte_io(uint16 adr, uint8 byte)
if ((via2_prb ^ byte) & 8) // Bit 3: Drive LED if ((via2_prb ^ byte) & 8) // Bit 3: Drive LED
the_display->UpdateLEDs(byte & 8 ? 1 : 0, 0, 0, 0); the_display->UpdateLEDs(byte & 8 ? 1 : 0, 0, 0, 0);
if ((via2_prb ^ byte) & 3) // Bits 0/1: Stepper motor if ((via2_prb ^ byte) & 3) // Bits 0/1: Stepper motor
{
if ((via2_prb & 3) == ((byte+1) & 3)) if ((via2_prb & 3) == ((byte+1) & 3))
the_job->MoveHeadOut(); the_job->MoveHeadOut();
else if ((via2_prb & 3) == ((byte-1) & 3)) else if ((via2_prb & 3) == ((byte-1) & 3))
the_job->MoveHeadIn(); the_job->MoveHeadIn();
}
via2_prb = byte & 0xef; via2_prb = byte & 0xef;
break; break;
case 1: case 1:
@ -414,21 +416,21 @@ void MOS6502_1541::write_byte_io(uint16 adr, uint8 byte)
break; break;
case 4: case 4:
case 6: case 6:
via2_t1l = via2_t1l & 0xff00 | byte; via2_t1l = (via2_t1l & 0xff00) | byte;
break; break;
case 5: case 5:
via2_t1l = via2_t1l & 0xff | (byte << 8); via2_t1l = (via2_t1l & 0xff) | (byte << 8);
via2_ifr &= 0xbf; via2_ifr &= 0xbf;
via2_t1c = via2_t1l; via2_t1c = via2_t1l;
break; break;
case 7: case 7:
via2_t1l = via2_t1l & 0xff | (byte << 8); via2_t1l = (via2_t1l & 0xff) | (byte << 8);
break; break;
case 8: case 8:
via2_t2l = via2_t2l & 0xff00 | byte; via2_t2l = (via2_t2l & 0xff00) | byte;
break; break;
case 9: case 9:
via2_t2l = via2_t2l & 0xff | (byte << 8); via2_t2l = (via2_t2l & 0xff) | (byte << 8);
via2_ifr &= 0xdf; via2_ifr &= 0xdf;
via2_t2c = via2_t2l; via2_t2c = via2_t2l;
break; break;

View File

@ -244,7 +244,7 @@ inline uint8 MOS6510::read_byte_io(uint16 adr)
case 0x9: case 0x9:
case 0xa: case 0xa:
case 0xb: case 0xb:
return color_ram[adr & 0x03ff] & 0x0f | TheVIC->LastVICByte & 0xf0; return (color_ram[adr & 0x03ff] & 0x0f) | (TheVIC->LastVICByte & 0xf0);
case 0xc: // CIA 1 case 0xc: // CIA 1
return TheCIA1->ReadRegister(adr & 0x0f); return TheCIA1->ReadRegister(adr & 0x0f);
case 0xd: // CIA 2 case 0xd: // CIA 2

View File

@ -200,7 +200,7 @@
state = A_ABSX2; state = A_ABSX2;
else else
state = A_ABSX3; state = A_ABSX3;
ar = (ar + x) & 0xff | (ar2 << 8); ar = ((ar + x) & 0xff) | (ar2 << 8);
break; break;
case A_ABSX2: // No page crossed case A_ABSX2: // No page crossed
read_idle(ar); read_idle(ar);
@ -220,7 +220,7 @@
state = A_ABSY2; state = A_ABSY2;
else else
state = A_ABSY3; state = A_ABSY3;
ar = (ar + y) & 0xff | (ar2 << 8); ar = ((ar + y) & 0xff) | (ar2 << 8);
break; break;
case A_ABSY2: // No page crossed case A_ABSY2: // No page crossed
read_idle(ar); read_idle(ar);
@ -262,7 +262,7 @@
state = A_INDY3; state = A_INDY3;
else else
state = A_INDY4; state = A_INDY4;
ar = (ar + y) & 0xff | (ar2 << 8); ar = ((ar + y) & 0xff) | (ar2 << 8);
break; break;
case A_INDY3: // No page crossed case A_INDY3: // No page crossed
read_idle(ar); read_idle(ar);
@ -281,10 +281,10 @@
case AE_ABSX1: case AE_ABSX1:
read_to(pc++, data); read_to(pc++, data);
if (ar+x < 0x100) { if (ar+x < 0x100) {
ar = (ar + x) & 0xff | (data << 8); ar = ((ar + x) & 0xff) | (data << 8);
Execute; Execute;
} else { } else {
ar = (ar + x) & 0xff | (data << 8); ar = ((ar + x) & 0xff) | (data << 8);
state = AE_ABSX2; state = AE_ABSX2;
} }
break; break;
@ -300,10 +300,10 @@
case AE_ABSY1: case AE_ABSY1:
read_to(pc++, data); read_to(pc++, data);
if (ar+y < 0x100) { if (ar+y < 0x100) {
ar = (ar + y) & 0xff | (data << 8); ar = ((ar + y) & 0xff) | (data << 8);
Execute; Execute;
} else { } else {
ar = (ar + y) & 0xff | (data << 8); ar = ((ar + y) & 0xff) | (data << 8);
state = AE_ABSY2; state = AE_ABSY2;
} }
break; break;
@ -323,10 +323,10 @@
case AE_INDY2: case AE_INDY2:
read_to((ar2 + 1) & 0xff, data); read_to((ar2 + 1) & 0xff, data);
if (ar+y < 0x100) { if (ar+y < 0x100) {
ar = (ar + y) & 0xff | (data << 8); ar = ((ar + y) & 0xff) | (data << 8);
Execute; Execute;
} else { } else {
ar = (ar + y) & 0xff | (data << 8); ar = ((ar + y) & 0xff) | (data << 8);
state = AE_INDY3; state = AE_INDY3;
} }
break; break;
@ -378,7 +378,7 @@
state = M_ABSX2; state = M_ABSX2;
else else
state = M_ABSX3; state = M_ABSX3;
ar = (ar + x) & 0xff | (data << 8); ar = ((ar + x) & 0xff) | (data << 8);
break; break;
case M_ABSX2: // No page crossed case M_ABSX2: // No page crossed
read_idle(ar); read_idle(ar);
@ -398,7 +398,7 @@
state = M_ABSY2; state = M_ABSY2;
else else
state = M_ABSY3; state = M_ABSY3;
ar = (ar + y) & 0xff | (data << 8); ar = ((ar + y) & 0xff) | (data << 8);
break; break;
case M_ABSY2: // No page crossed case M_ABSY2: // No page crossed
read_idle(ar); read_idle(ar);
@ -440,7 +440,7 @@
state = M_INDY3; state = M_INDY3;
else else
state = M_INDY4; state = M_INDY4;
ar = (ar + y) & 0xff | (data << 8); ar = ((ar + y) & 0xff) | (data << 8);
break; break;
case M_INDY3: // No page crossed case M_INDY3: // No page crossed
read_idle(ar); read_idle(ar);
@ -758,7 +758,7 @@
state = O_JMP_I1; state = O_JMP_I1;
break; break;
case O_JMP_I1: case O_JMP_I1:
read_to((ar + 1) & 0xff | ar & 0xff00, data); read_to(((ar + 1) & 0xff) | (ar & 0xff00), data);
pc |= data << 8; pc |= data << 8;
Last; Last;
@ -1070,7 +1070,7 @@
z_flag = a; z_flag = a;
v_flag = (data ^ a) & 0x40; v_flag = (data ^ a) & 0x40;
if ((data & 0x0f) + (data & 0x01) > 5) if ((data & 0x0f) + (data & 0x01) > 5)
a = a & 0xf0 | (a + 6) & 0x0f; a = (a & 0xf0) | ((a + 6) & 0x0f);
if ((c_flag = ((data + (data & 0x10)) & 0x1f0) > 0x50) != 0) if ((c_flag = ((data + (data & 0x10)) & 0x1f0) > 0x50) != 0)
a += 0x60; a += 0x60;
} }