662 lines
14 KiB
C++
662 lines
14 KiB
C++
/*
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* CPU1541_SC.cpp - Single-cycle 6502 (1541) emulation
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*
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* Frodo (C) 1994-1997,2002-2005 Christian Bauer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* Notes:
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* ------
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*
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* Opcode execution:
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* - All opcodes are resolved into single clock cycles. There is one
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* switch case for each cycle.
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* - The "state" variable specifies the routine to be executed in the
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* next cycle. Its upper 8 bits contain the current opcode, its lower
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* 8 bits contain the cycle number (0..7) within the opcode.
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* - Opcodes are fetched in cycle 0 (state = 0)
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* - The states 0x0010..0x0027 are used for interrupts
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* - There is exactly one memory access in each clock cycle
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*
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* Memory map (1541C, the 1541 and 1541-II are a bit different):
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*
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* $0000-$07ff RAM (2K)
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* $0800-$0fff RAM mirror
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* $1000-$17ff free
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* $1800-$1bff VIA 1
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* $1c00-$1fff VIA 2
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* $2000-$bfff free
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* $c000-$ffff ROM (16K)
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*
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* - All memory accesses are done with the read_byte() and
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* write_byte() functions which also do the memory address
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* decoding.
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* - The possible interrupt sources are:
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* INT_VIA1IRQ: I flag is checked, jump to ($fffe) (unused)
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* INT_VIA2IRQ: I flag is checked, jump to ($fffe) (unused)
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* INT_IECIRQ: I flag is checked, jump to ($fffe) (unused)
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* INT_RESET: Jump to ($fffc)
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* - The z_flag variable has the inverse meaning of the
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* 6502 Z flag
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* - Only the highest bit of the n_flag variable is used
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* - The $f2 opcode that would normally crash the 6502 is
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* used to implement emulator-specific functions
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* - The 1541 6502 emulation also includes a very simple VIA
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* emulation (enough to make the IEC bus and GCR loading work).
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* It's too small to move it to a source file of its own.
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*
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* Incompatibilities:
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* ------------------
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*
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* - VIA emulation incomplete
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*/
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#include "sysdeps.h"
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#include "CPU1541.h"
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#include "CPU_common.h"
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#include "1541job.h"
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#include "C64.h"
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#include "CIA.h"
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#include "Display.h"
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enum {
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INT_RESET = 3
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};
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/*
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* 6502 constructor: Initialize registers
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*/
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MOS6502_1541::MOS6502_1541(C64 *c64, Job1541 *job, C64Display *disp, uint8 *Ram, uint8 *Rom)
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: ram(Ram), rom(Rom), the_c64(c64), the_display(disp), the_job(job)
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{
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a = x = y = 0;
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sp = 0xff;
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n_flag = z_flag = 0;
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v_flag = d_flag = c_flag = false;
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i_flag = true;
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via1_t1c = via1_t1l = via1_t2c = via1_t2l = 0;
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via1_sr = 0;
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via2_t1c = via2_t1l = via2_t2c = via2_t2l = 0;
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via2_sr = 0;
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first_irq_cycle = 0;
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Idle = false;
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}
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/*
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* Reset CPU asynchronously
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*/
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void MOS6502_1541::AsyncReset(void)
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{
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interrupt.intr[INT_RESET] = true;
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Idle = false;
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}
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/*
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* Get 6502 register state
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*/
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void MOS6502_1541::GetState(MOS6502State *s)
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{
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s->a = a;
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s->x = x;
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s->y = y;
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s->p = 0x20 | (n_flag & 0x80);
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if (v_flag) s->p |= 0x40;
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if (d_flag) s->p |= 0x08;
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if (i_flag) s->p |= 0x04;
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if (!z_flag) s->p |= 0x02;
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if (c_flag) s->p |= 0x01;
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s->pc = pc;
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s->sp = sp | 0x0100;
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s->intr[INT_VIA1IRQ] = interrupt.intr[INT_VIA1IRQ];
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s->intr[INT_VIA2IRQ] = interrupt.intr[INT_VIA2IRQ];
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s->intr[INT_IECIRQ] = interrupt.intr[INT_IECIRQ];
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s->intr[INT_RESET] = interrupt.intr[INT_RESET];
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s->idle = Idle;
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s->via1_pra = via1_pra; s->via1_ddra = via1_ddra;
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s->via1_prb = via1_prb; s->via1_ddrb = via1_ddrb;
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s->via1_t1c = via1_t1c; s->via1_t1l = via1_t1l;
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s->via1_t2c = via1_t2c; s->via1_t2l = via1_t2l;
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s->via1_sr = via1_sr;
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s->via1_acr = via1_acr; s->via1_pcr = via1_pcr;
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s->via1_ifr = via1_ifr; s->via1_ier = via1_ier;
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s->via2_pra = via2_pra; s->via2_ddra = via2_ddra;
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s->via2_prb = via2_prb; s->via2_ddrb = via2_ddrb;
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s->via2_t1c = via2_t1c; s->via2_t1l = via2_t1l;
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s->via2_t2c = via2_t2c; s->via2_t2l = via2_t2l;
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s->via2_sr = via2_sr;
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s->via2_acr = via2_acr; s->via2_pcr = via2_pcr;
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s->via2_ifr = via2_ifr; s->via2_ier = via2_ier;
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}
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/*
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* Restore 6502 state
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*/
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void MOS6502_1541::SetState(MOS6502State *s)
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{
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a = s->a;
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x = s->x;
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y = s->y;
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n_flag = s->p;
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v_flag = s->p & 0x40;
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d_flag = s->p & 0x08;
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i_flag = s->p & 0x04;
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z_flag = !(s->p & 0x02);
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c_flag = s->p & 0x01;
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pc = s->pc;
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sp = s->sp & 0xff;
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interrupt.intr[INT_VIA1IRQ] = s->intr[INT_VIA1IRQ];
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interrupt.intr[INT_VIA2IRQ] = s->intr[INT_VIA2IRQ];
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interrupt.intr[INT_IECIRQ] = s->intr[INT_IECIRQ];
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interrupt.intr[INT_RESET] = s->intr[INT_RESET];
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Idle = s->idle;
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via1_pra = s->via1_pra; via1_ddra = s->via1_ddra;
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via1_prb = s->via1_prb; via1_ddrb = s->via1_ddrb;
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via1_t1c = s->via1_t1c; via1_t1l = s->via1_t1l;
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via1_t2c = s->via1_t2c; via1_t2l = s->via1_t2l;
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via1_sr = s->via1_sr;
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via1_acr = s->via1_acr; via1_pcr = s->via1_pcr;
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via1_ifr = s->via1_ifr; via1_ier = s->via1_ier;
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via2_pra = s->via2_pra; via2_ddra = s->via2_ddra;
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via2_prb = s->via2_prb; via2_ddrb = s->via2_ddrb;
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via2_t1c = s->via2_t1c; via2_t1l = s->via2_t1l;
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via2_t2c = s->via2_t2c; via2_t2l = s->via2_t2l;
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via2_sr = s->via2_sr;
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via2_acr = s->via2_acr; via2_pcr = s->via2_pcr;
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via2_ifr = s->via2_ifr; via2_ier = s->via2_ier;
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}
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/*
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* Read a byte from I/O space
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*/
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inline uint8 MOS6502_1541::read_byte_io(uint16 adr)
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{
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if ((adr & 0xfc00) == 0x1800) // VIA 1
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switch (adr & 0xf) {
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case 0:
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return (via1_prb & 0x1a
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| ((IECLines & TheCIA2->IECLines) >> 7) // DATA
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| ((IECLines & TheCIA2->IECLines) >> 4) & 0x04 // CLK
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| (TheCIA2->IECLines << 3) & 0x80) ^ 0x85; // ATN
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case 1:
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case 15:
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return 0xff; // Keep 1541C ROMs happy (track 0 sensor)
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case 2:
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return via1_ddrb;
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case 3:
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return via1_ddra;
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case 4:
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via1_ifr &= 0xbf;
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return via1_t1c;
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case 5:
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return via1_t1c >> 8;
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case 6:
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return via1_t1l;
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case 7:
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return via1_t1l >> 8;
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case 8:
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via1_ifr &= 0xdf;
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return via1_t2c;
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case 9:
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return via1_t2c >> 8;
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case 10:
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return via1_sr;
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case 11:
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return via1_acr;
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case 12:
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return via1_pcr;
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case 13:
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return via1_ifr | (via1_ifr & via1_ier ? 0x80 : 0);
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case 14:
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return via1_ier | 0x80;
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default: // Can't happen
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return 0;
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}
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else if ((adr & 0xfc00) == 0x1c00) // VIA 2
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switch (adr & 0xf) {
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case 0:
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if (the_job->SyncFound())
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return via2_prb & 0x7f | the_job->WPState();
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else
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return via2_prb | 0x80 | the_job->WPState();
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case 1:
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case 15:
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return the_job->ReadGCRByte();
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case 2:
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return via2_ddrb;
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case 3:
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return via2_ddra;
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case 4:
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via2_ifr &= 0xbf;
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interrupt.intr[INT_VIA2IRQ] = false; // Clear job IRQ
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return via2_t1c;
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case 5:
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return via2_t1c >> 8;
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case 6:
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return via2_t1l;
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case 7:
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return via2_t1l >> 8;
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case 8:
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via2_ifr &= 0xdf;
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return via2_t2c;
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case 9:
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return via2_t2c >> 8;
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case 10:
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return via2_sr;
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case 11:
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return via2_acr;
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case 12:
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return via2_pcr;
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case 13:
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return via2_ifr | (via2_ifr & via2_ier ? 0x80 : 0);
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case 14:
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return via2_ier | 0x80;
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default: // Can't happen
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return 0;
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}
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else
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return adr >> 8;
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}
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/*
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* Read a byte from the CPU's address space
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*/
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uint8 MOS6502_1541::read_byte(uint16 adr)
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{
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if (adr >= 0xc000)
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return rom[adr & 0x3fff];
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else if (adr < 0x1000)
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return ram[adr & 0x07ff];
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else
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return read_byte_io(adr);
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}
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/*
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* Read a word (little-endian) from the CPU's address space
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*/
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inline uint16 MOS6502_1541::read_word(uint16 adr)
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{
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return read_byte(adr) | (read_byte(adr+1) << 8);
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}
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/*
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* Write a byte to I/O space
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*/
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void MOS6502_1541::write_byte_io(uint16 adr, uint8 byte)
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{
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if ((adr & 0xfc00) == 0x1800) // VIA 1
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switch (adr & 0xf) {
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case 0:
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via1_prb = byte;
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byte = ~via1_prb & via1_ddrb;
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IECLines = (byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80
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| (byte << 3) & 0x40;
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break;
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case 1:
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case 15:
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via1_pra = byte;
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break;
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case 2:
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via1_ddrb = byte;
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byte &= ~via1_prb;
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IECLines = (byte << 6) & ((~byte ^ TheCIA2->IECLines) << 3) & 0x80
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| (byte << 3) & 0x40;
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break;
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case 3:
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via1_ddra = byte;
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break;
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case 4:
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case 6:
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via1_t1l = via1_t1l & 0xff00 | byte;
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break;
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case 5:
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via1_t1l = via1_t1l & 0xff | (byte << 8);
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via1_ifr &= 0xbf;
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via1_t1c = via1_t1l;
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break;
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case 7:
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via1_t1l = via1_t1l & 0xff | (byte << 8);
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break;
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case 8:
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via1_t2l = via1_t2l & 0xff00 | byte;
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break;
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case 9:
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via1_t2l = via1_t2l & 0xff | (byte << 8);
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via1_ifr &= 0xdf;
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via1_t2c = via1_t2l;
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break;
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case 10:
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via1_sr = byte;
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break;
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case 11:
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via1_acr = byte;
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break;
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case 12:
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via1_pcr = byte;
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break;
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case 13:
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via1_ifr &= ~byte;
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break;
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case 14:
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if (byte & 0x80)
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via1_ier |= byte & 0x7f;
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else
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via1_ier &= ~byte;
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break;
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}
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else if ((adr & 0xfc00) == 0x1c00)
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switch (adr & 0xf) {
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case 0:
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if ((via2_prb ^ byte) & 8) // Bit 3: Drive LED
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the_display->UpdateLEDs(byte & 8 ? 1 : 0, 0, 0, 0);
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if ((via2_prb ^ byte) & 3) // Bits 0/1: Stepper motor
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if ((via2_prb & 3) == ((byte+1) & 3))
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the_job->MoveHeadOut();
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else if ((via2_prb & 3) == ((byte-1) & 3))
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the_job->MoveHeadIn();
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via2_prb = byte & 0xef;
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break;
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case 1:
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case 15:
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via2_pra = byte;
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break;
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case 2:
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via2_ddrb = byte;
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break;
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case 3:
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via2_ddra = byte;
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break;
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case 4:
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case 6:
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via2_t1l = via2_t1l & 0xff00 | byte;
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break;
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case 5:
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via2_t1l = via2_t1l & 0xff | (byte << 8);
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via2_ifr &= 0xbf;
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via2_t1c = via2_t1l;
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break;
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case 7:
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via2_t1l = via2_t1l & 0xff | (byte << 8);
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break;
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case 8:
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via2_t2l = via2_t2l & 0xff00 | byte;
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break;
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case 9:
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via2_t2l = via2_t2l & 0xff | (byte << 8);
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via2_ifr &= 0xdf;
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via2_t2c = via2_t2l;
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break;
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case 10:
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via2_sr = byte;
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break;
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case 11:
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via2_acr = byte;
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break;
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case 12:
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via2_pcr = byte;
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break;
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case 13:
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via2_ifr &= ~byte;
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break;
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case 14:
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if (byte & 0x80)
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via2_ier |= byte & 0x7f;
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else
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via2_ier &= ~byte;
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break;
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}
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}
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/*
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* Write a byte to the CPU's address space
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*/
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inline void MOS6502_1541::write_byte(uint16 adr, uint8 byte)
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{
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if (adr < 0x1000)
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ram[adr & 0x7ff] = byte;
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else
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write_byte_io(adr, byte);
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}
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/*
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* Read byte from 6502/1541 address space (used by SAM)
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*/
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uint8 MOS6502_1541::ExtReadByte(uint16 adr)
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{
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return read_byte(adr);
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}
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/*
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* Write byte to 6502/1541 address space (used by SAM)
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*/
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void MOS6502_1541::ExtWriteByte(uint16 adr, uint8 byte)
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{
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write_byte(adr, byte);
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}
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/*
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* Adc instruction
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*/
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inline void MOS6502_1541::do_adc(uint8 byte)
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{
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if (!d_flag) {
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uint16 tmp;
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// Binary mode
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tmp = a + byte + (c_flag ? 1 : 0);
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c_flag = tmp > 0xff;
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v_flag = !((a ^ byte) & 0x80) && ((a ^ tmp) & 0x80);
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z_flag = n_flag = a = tmp;
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} else {
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uint16 al, ah;
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// Decimal mode
|
|
al = (a & 0x0f) + (byte & 0x0f) + (c_flag ? 1 : 0); // Calculate lower nybble
|
|
if (al > 9) al += 6; // BCD fixup for lower nybble
|
|
|
|
ah = (a >> 4) + (byte >> 4); // Calculate upper nybble
|
|
if (al > 0x0f) ah++;
|
|
|
|
z_flag = a + byte + (c_flag ? 1 : 0); // Set flags
|
|
n_flag = ah << 4; // Only highest bit used
|
|
v_flag = (((ah << 4) ^ a) & 0x80) && !((a ^ byte) & 0x80);
|
|
|
|
if (ah > 9) ah += 6; // BCD fixup for upper nybble
|
|
c_flag = ah > 0x0f; // Set carry flag
|
|
a = (ah << 4) | (al & 0x0f); // Compose result
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
* Sbc instruction
|
|
*/
|
|
|
|
inline void MOS6502_1541::do_sbc(uint8 byte)
|
|
{
|
|
uint16 tmp = a - byte - (c_flag ? 0 : 1);
|
|
|
|
if (!d_flag) {
|
|
|
|
// Binary mode
|
|
c_flag = tmp < 0x100;
|
|
v_flag = ((a ^ tmp) & 0x80) && ((a ^ byte) & 0x80);
|
|
z_flag = n_flag = a = tmp;
|
|
|
|
} else {
|
|
uint16 al, ah;
|
|
|
|
// Decimal mode
|
|
al = (a & 0x0f) - (byte & 0x0f) - (c_flag ? 0 : 1); // Calculate lower nybble
|
|
ah = (a >> 4) - (byte >> 4); // Calculate upper nybble
|
|
if (al & 0x10) {
|
|
al -= 6; // BCD fixup for lower nybble
|
|
ah--;
|
|
}
|
|
if (ah & 0x10) ah -= 6; // BCD fixup for upper nybble
|
|
|
|
c_flag = tmp < 0x100; // Set flags
|
|
v_flag = ((a ^ tmp) & 0x80) && ((a ^ byte) & 0x80);
|
|
z_flag = n_flag = tmp;
|
|
|
|
a = (ah << 4) | (al & 0x0f); // Compose result
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
* Reset CPU
|
|
*/
|
|
|
|
void MOS6502_1541::Reset(void)
|
|
{
|
|
// IEC lines and VIA registers
|
|
IECLines = 0xc0;
|
|
|
|
via1_pra = via1_ddra = via1_prb = via1_ddrb = 0;
|
|
via1_acr = via1_pcr = 0;
|
|
via1_ifr = via1_ier = 0;
|
|
via2_pra = via2_ddra = via2_prb = via2_ddrb = 0;
|
|
via2_acr = via2_pcr = 0;
|
|
via2_ifr = via2_ier = 0;
|
|
|
|
// Clear all interrupt lines
|
|
interrupt.intr_any = 0;
|
|
|
|
// Read reset vector
|
|
pc = read_word(0xfffc);
|
|
state = 0;
|
|
|
|
// Wake up 1541
|
|
Idle = false;
|
|
}
|
|
|
|
|
|
/*
|
|
* Illegal opcode encountered
|
|
*/
|
|
|
|
void MOS6502_1541::illegal_op(uint8 op, uint16 at)
|
|
{
|
|
char illop_msg[80];
|
|
|
|
sprintf(illop_msg, "1541: Illegal opcode %02x at %04x.", op, at);
|
|
if (ShowRequester(illop_msg, "Reset 1541", "Reset C64"))
|
|
the_c64->Reset();
|
|
Reset();
|
|
}
|
|
|
|
|
|
/*
|
|
* Emulate one 6502 clock cycle
|
|
*/
|
|
|
|
// Read byte from memory
|
|
#define read_to(adr, to) \
|
|
to = read_byte(adr);
|
|
|
|
// Read byte from memory, throw away result
|
|
#define read_idle(adr) \
|
|
read_byte(adr);
|
|
|
|
void MOS6502_1541::EmulateCycle(void)
|
|
{
|
|
uint8 data, tmp;
|
|
|
|
// Any pending interrupts in state 0 (opcode fetch)?
|
|
if (!state && interrupt.intr_any) {
|
|
if (interrupt.intr[INT_RESET])
|
|
Reset();
|
|
else if ((interrupt.intr[INT_VIA1IRQ] || interrupt.intr[INT_VIA2IRQ] || interrupt.intr[INT_IECIRQ]) && (the_c64->CycleCounter-first_irq_cycle >= 2) && !i_flag)
|
|
state = 0x0008;
|
|
}
|
|
|
|
#define IS_CPU_1541
|
|
#include "CPU_emulcycle.h"
|
|
|
|
// Extension opcode
|
|
case O_EXT:
|
|
if (pc < 0xc000) {
|
|
illegal_op(0xf2, pc-1);
|
|
break;
|
|
}
|
|
switch (read_byte(pc++)) {
|
|
case 0x00: // Go to sleep in DOS idle loop if error flag is clear and no command received
|
|
Idle = !(ram[0x26c] | ram[0x7c]);
|
|
pc = 0xebff;
|
|
Last;
|
|
case 0x01: // Write sector
|
|
the_job->WriteSector();
|
|
pc = 0xf5dc;
|
|
Last;
|
|
case 0x02: // Format track
|
|
the_job->FormatTrack();
|
|
pc = 0xfd8b;
|
|
Last;
|
|
default:
|
|
illegal_op(0xf2, pc-1);
|
|
break;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
illegal_op(op, pc-1);
|
|
break;
|
|
}
|
|
}
|