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571 lines
12 KiB
C++
571 lines
12 KiB
C++
/*
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* CIA.cpp - 6526 emulation
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*
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* Frodo (C) 1994-1997,2002-2005 Christian Bauer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* Notes:
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* ------
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*
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* - The EmulateLine() function is called for every emulated raster
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* line. It counts down the timers and triggers interrupts if
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* necessary.
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* - The TOD clocks are counted by CountTOD() during the VBlank, so
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* the input frequency is 50Hz
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* - The fields KeyMatrix and RevMatrix contain one bit for each
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* key on the C64 keyboard (0: key pressed, 1: key released).
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* KeyMatrix is used for normal keyboard polling (PRA->PRB),
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* RevMatrix for reversed polling (PRB->PRA).
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*
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* Incompatibilities:
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* ------------------
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*
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* - The TOD clock should not be stopped on a read access, but
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* latched
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* - The SDR interrupt is faked
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*/
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#include "sysdeps.h"
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#include "CIA.h"
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#include "CPUC64.h"
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#include "CPU1541.h"
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#include "VIC.h"
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#include "Prefs.h"
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/*
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* Constructors
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*/
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MOS6526::MOS6526(MOS6510 *CPU) : the_cpu(CPU) {}
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MOS6526_1::MOS6526_1(MOS6510 *CPU, MOS6569 *VIC) : MOS6526(CPU), the_vic(VIC) {}
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MOS6526_2::MOS6526_2(MOS6510 *CPU, MOS6569 *VIC, MOS6502_1541 *CPU1541) : MOS6526(CPU), the_vic(VIC), the_cpu_1541(CPU1541) {}
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/*
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* Reset the CIA
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*/
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void MOS6526::Reset(void)
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{
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pra = prb = ddra = ddrb = 0;
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ta = tb = 0xffff;
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latcha = latchb = 1;
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tod_10ths = tod_sec = tod_min = tod_hr = 0;
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alm_10ths = alm_sec = alm_min = alm_hr = 0;
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sdr = icr = cra = crb = int_mask = 0;
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tod_halt = ta_cnt_phi2 = tb_cnt_phi2 = tb_cnt_ta = false;
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tod_divider = 0;
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}
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void MOS6526_1::Reset(void)
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{
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MOS6526::Reset();
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// Clear keyboard matrix and joystick states
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for (int i=0; i<8; i++)
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KeyMatrix[i] = RevMatrix[i] = 0xff;
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Joystick1 = Joystick2 = 0xff;
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prev_lp = 0x10;
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}
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void MOS6526_2::Reset(void)
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{
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MOS6526::Reset();
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// VA14/15 = 0
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the_vic->ChangedVA(0);
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// IEC
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IECLines = 0xd0;
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}
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/*
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* Get CIA state
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*/
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void MOS6526::GetState(MOS6526State *cs)
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{
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cs->pra = pra;
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cs->prb = prb;
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cs->ddra = ddra;
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cs->ddrb = ddrb;
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cs->ta_lo = ta & 0xff;
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cs->ta_hi = ta >> 8;
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cs->tb_lo = tb & 0xff;
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cs->tb_hi = tb >> 8;
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cs->latcha = latcha;
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cs->latchb = latchb;
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cs->cra = cra;
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cs->crb = crb;
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cs->tod_10ths = tod_10ths;
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cs->tod_sec = tod_sec;
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cs->tod_min = tod_min;
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cs->tod_hr = tod_hr;
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cs->alm_10ths = alm_10ths;
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cs->alm_sec = alm_sec;
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cs->alm_min = alm_min;
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cs->alm_hr = alm_hr;
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cs->sdr = sdr;
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cs->int_data = icr;
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cs->int_mask = int_mask;
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}
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/*
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* Restore CIA state
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*/
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void MOS6526::SetState(MOS6526State *cs)
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{
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pra = cs->pra;
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prb = cs->prb;
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ddra = cs->ddra;
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ddrb = cs->ddrb;
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ta = (cs->ta_hi << 8) | cs->ta_lo;
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tb = (cs->tb_hi << 8) | cs->tb_lo;
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latcha = cs->latcha;
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latchb = cs->latchb;
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cra = cs->cra;
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crb = cs->crb;
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tod_10ths = cs->tod_10ths;
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tod_sec = cs->tod_sec;
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tod_min = cs->tod_min;
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tod_hr = cs->tod_hr;
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alm_10ths = cs->alm_10ths;
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alm_sec = cs->alm_sec;
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alm_min = cs->alm_min;
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alm_hr = cs->alm_hr;
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sdr = cs->sdr;
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icr = cs->int_data;
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int_mask = cs->int_mask;
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tod_halt = false;
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ta_cnt_phi2 = ((cra & 0x21) == 0x01);
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tb_cnt_phi2 = ((crb & 0x61) == 0x01);
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tb_cnt_ta = ((crb & 0x61) == 0x41);
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}
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/*
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* Read from register (CIA 1)
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*/
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uint8 MOS6526_1::ReadRegister(uint16 adr)
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{
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switch (adr) {
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case 0x00: {
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uint8 ret = pra | ~ddra, tst = (prb | ~ddrb) & Joystick1;
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if (!(tst & 0x01)) ret &= RevMatrix[0]; // AND all active columns
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if (!(tst & 0x02)) ret &= RevMatrix[1];
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if (!(tst & 0x04)) ret &= RevMatrix[2];
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if (!(tst & 0x08)) ret &= RevMatrix[3];
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if (!(tst & 0x10)) ret &= RevMatrix[4];
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if (!(tst & 0x20)) ret &= RevMatrix[5];
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if (!(tst & 0x40)) ret &= RevMatrix[6];
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if (!(tst & 0x80)) ret &= RevMatrix[7];
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return ret & Joystick2;
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}
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case 0x01: {
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uint8 ret = ~ddrb, tst = (pra | ~ddra) & Joystick2;
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if (!(tst & 0x01)) ret &= KeyMatrix[0]; // AND all active rows
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if (!(tst & 0x02)) ret &= KeyMatrix[1];
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if (!(tst & 0x04)) ret &= KeyMatrix[2];
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if (!(tst & 0x08)) ret &= KeyMatrix[3];
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if (!(tst & 0x10)) ret &= KeyMatrix[4];
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if (!(tst & 0x20)) ret &= KeyMatrix[5];
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if (!(tst & 0x40)) ret &= KeyMatrix[6];
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if (!(tst & 0x80)) ret &= KeyMatrix[7];
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return (ret | (prb & ddrb)) & Joystick1;
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}
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case 0x02: return ddra;
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case 0x03: return ddrb;
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case 0x04: return ta;
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case 0x05: return ta >> 8;
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case 0x06: return tb;
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case 0x07: return tb >> 8;
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case 0x08: tod_halt = false; return tod_10ths;
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case 0x09: return tod_sec;
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case 0x0a: return tod_min;
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case 0x0b: tod_halt = true; return tod_hr;
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case 0x0c: return sdr;
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case 0x0d: {
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uint8 ret = icr; // Read and clear ICR
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icr = 0;
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the_cpu->ClearCIAIRQ(); // Clear IRQ
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return ret;
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}
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case 0x0e: return cra;
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case 0x0f: return crb;
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}
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return 0; // Can't happen
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}
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/*
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* Read from register (CIA 2)
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*/
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uint8 MOS6526_2::ReadRegister(uint16 adr)
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{
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switch (adr) {
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case 0x00:
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return (pra | ~ddra) & 0x3f
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| IECLines & the_cpu_1541->IECLines;
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case 0x01: return prb | ~ddrb;
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case 0x02: return ddra;
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case 0x03: return ddrb;
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case 0x04: return ta;
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case 0x05: return ta >> 8;
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case 0x06: return tb;
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case 0x07: return tb >> 8;
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case 0x08: tod_halt = false; return tod_10ths;
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case 0x09: return tod_sec;
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case 0x0a: return tod_min;
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case 0x0b: tod_halt = true; return tod_hr;
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case 0x0c: return sdr;
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case 0x0d: {
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uint8 ret = icr; // Read and clear ICR
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icr = 0;
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the_cpu->ClearNMI(); // Clear NMI
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return ret;
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}
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case 0x0e: return cra;
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case 0x0f: return crb;
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}
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return 0; // Can't happen
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}
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/*
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* Write to register (CIA 1)
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*/
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// Write to port B, check for lightpen interrupt
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inline void MOS6526_1::check_lp(void)
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{
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if ((prb | ~ddrb) & 0x10 != prev_lp)
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the_vic->TriggerLightpen();
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prev_lp = (prb | ~ddrb) & 0x10;
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}
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void MOS6526_1::WriteRegister(uint16 adr, uint8 byte)
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{
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switch (adr) {
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case 0x0: pra = byte; break;
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case 0x1:
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prb = byte;
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check_lp();
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break;
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case 0x2: ddra = byte; break;
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case 0x3:
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ddrb = byte;
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check_lp();
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break;
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case 0x4: latcha = (latcha & 0xff00) | byte; break;
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case 0x5:
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latcha = (latcha & 0xff) | (byte << 8);
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if (!(cra & 1)) // Reload timer if stopped
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ta = latcha;
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break;
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case 0x6: latchb = (latchb & 0xff00) | byte; break;
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case 0x7:
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latchb = (latchb & 0xff) | (byte << 8);
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if (!(crb & 1)) // Reload timer if stopped
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tb = latchb;
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break;
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case 0x8:
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if (crb & 0x80)
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alm_10ths = byte & 0x0f;
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else
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tod_10ths = byte & 0x0f;
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break;
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case 0x9:
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if (crb & 0x80)
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alm_sec = byte & 0x7f;
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else
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tod_sec = byte & 0x7f;
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break;
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case 0xa:
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if (crb & 0x80)
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alm_min = byte & 0x7f;
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else
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tod_min = byte & 0x7f;
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break;
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case 0xb:
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if (crb & 0x80)
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alm_hr = byte & 0x9f;
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else
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tod_hr = byte & 0x9f;
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break;
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case 0xc:
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sdr = byte;
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TriggerInterrupt(8); // Fake SDR interrupt for programs that need it
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break;
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case 0xd:
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if (ThePrefs.CIAIRQHack) // Hack for addressing modes that read from the address
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icr = 0;
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if (byte & 0x80) {
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int_mask |= byte & 0x7f;
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if (icr & int_mask & 0x1f) { // Trigger IRQ if pending
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icr |= 0x80;
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the_cpu->TriggerCIAIRQ();
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}
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} else
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int_mask &= ~byte;
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break;
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case 0xe:
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cra = byte & 0xef;
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if (byte & 0x10) // Force load
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ta = latcha;
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ta_cnt_phi2 = ((byte & 0x21) == 0x01);
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break;
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case 0xf:
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crb = byte & 0xef;
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if (byte & 0x10) // Force load
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tb = latchb;
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tb_cnt_phi2 = ((byte & 0x61) == 0x01);
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tb_cnt_ta = ((byte & 0x61) == 0x41);
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break;
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}
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}
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/*
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* Write to register (CIA 2)
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*/
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void MOS6526_2::WriteRegister(uint16 adr, uint8 byte)
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{
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switch (adr) {
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case 0x0:{
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pra = byte;
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byte = ~pra & ddra;
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the_vic->ChangedVA(byte & 3);
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uint8 old_lines = IECLines;
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IECLines = (byte << 2) & 0x80 // DATA
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| (byte << 2) & 0x40 // CLK
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| (byte << 1) & 0x10; // ATN
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if ((IECLines ^ old_lines) & 0x10) { // ATN changed
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the_cpu_1541->NewATNState();
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if (old_lines & 0x10) // ATN 1->0
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the_cpu_1541->IECInterrupt();
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}
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break;
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}
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case 0x1: prb = byte; break;
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case 0x2:
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ddra = byte;
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the_vic->ChangedVA(~(pra | ~ddra) & 3);
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break;
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case 0x3: ddrb = byte; break;
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case 0x4: latcha = (latcha & 0xff00) | byte; break;
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case 0x5:
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latcha = (latcha & 0xff) | (byte << 8);
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if (!(cra & 1)) // Reload timer if stopped
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ta = latcha;
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break;
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case 0x6: latchb = (latchb & 0xff00) | byte; break;
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case 0x7:
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latchb = (latchb & 0xff) | (byte << 8);
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if (!(crb & 1)) // Reload timer if stopped
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tb = latchb;
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break;
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case 0x8:
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if (crb & 0x80)
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alm_10ths = byte & 0x0f;
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else
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tod_10ths = byte & 0x0f;
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break;
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case 0x9:
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if (crb & 0x80)
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alm_sec = byte & 0x7f;
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else
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tod_sec = byte & 0x7f;
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break;
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case 0xa:
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if (crb & 0x80)
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alm_min = byte & 0x7f;
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else
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tod_min = byte & 0x7f;
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break;
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case 0xb:
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if (crb & 0x80)
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alm_hr = byte & 0x9f;
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else
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tod_hr = byte & 0x9f;
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break;
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case 0xc:
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sdr = byte;
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TriggerInterrupt(8); // Fake SDR interrupt for programs that need it
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break;
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case 0xd:
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if (ThePrefs.CIAIRQHack)
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icr = 0;
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if (byte & 0x80) {
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int_mask |= byte & 0x7f;
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if (icr & int_mask & 0x1f) { // Trigger NMI if pending
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icr |= 0x80;
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the_cpu->TriggerNMI();
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}
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} else
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int_mask &= ~byte;
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break;
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case 0xe:
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cra = byte & 0xef;
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if (byte & 0x10) // Force load
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ta = latcha;
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ta_cnt_phi2 = ((byte & 0x21) == 0x01);
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break;
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case 0xf:
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crb = byte & 0xef;
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if (byte & 0x10) // Force load
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tb = latchb;
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tb_cnt_phi2 = ((byte & 0x61) == 0x01);
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tb_cnt_ta = ((byte & 0x61) == 0x41);
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break;
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}
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}
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/*
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* Count CIA TOD clock (called during VBlank)
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*/
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void MOS6526::CountTOD(void)
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{
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uint8 lo, hi;
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// Decrement frequency divider
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if (tod_divider)
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tod_divider--;
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else {
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// Reload divider according to 50/60 Hz flag
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if (cra & 0x80)
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tod_divider = 4;
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else
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tod_divider = 5;
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// 1/10 seconds
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tod_10ths++;
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if (tod_10ths > 9) {
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tod_10ths = 0;
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// Seconds
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lo = (tod_sec & 0x0f) + 1;
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hi = tod_sec >> 4;
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if (lo > 9) {
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lo = 0;
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hi++;
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}
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if (hi > 5) {
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tod_sec = 0;
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// Minutes
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lo = (tod_min & 0x0f) + 1;
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hi = tod_min >> 4;
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if (lo > 9) {
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lo = 0;
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hi++;
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}
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if (hi > 5) {
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tod_min = 0;
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// Hours
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lo = (tod_hr & 0x0f) + 1;
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hi = (tod_hr >> 4) & 1;
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tod_hr &= 0x80; // Keep AM/PM flag
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if (lo > 9) {
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lo = 0;
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hi++;
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}
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tod_hr |= (hi << 4) | lo;
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if ((tod_hr & 0x1f) > 0x11)
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tod_hr = tod_hr & 0x80 ^ 0x80;
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} else
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tod_min = (hi << 4) | lo;
|
|
} else
|
|
tod_sec = (hi << 4) | lo;
|
|
}
|
|
|
|
// Alarm time reached? Trigger interrupt if enabled
|
|
if (tod_10ths == alm_10ths && tod_sec == alm_sec &&
|
|
tod_min == alm_min && tod_hr == alm_hr)
|
|
TriggerInterrupt(4);
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
* Trigger IRQ (CIA 1)
|
|
*/
|
|
|
|
void MOS6526_1::TriggerInterrupt(int bit)
|
|
{
|
|
icr |= bit;
|
|
if (int_mask & bit) {
|
|
icr |= 0x80;
|
|
the_cpu->TriggerCIAIRQ();
|
|
}
|
|
}
|
|
|
|
|
|
/*
|
|
* Trigger NMI (CIA 2)
|
|
*/
|
|
|
|
void MOS6526_2::TriggerInterrupt(int bit)
|
|
{
|
|
icr |= bit;
|
|
if (int_mask & bit) {
|
|
icr |= 0x80;
|
|
the_cpu->TriggerNMI();
|
|
}
|
|
}
|