mirror of
https://github.com/marian-m12l/game-and-watch-zelda3.git
synced 2025-12-17 07:16:05 +01:00
349 lines
8.9 KiB
C
349 lines
8.9 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32h7xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2020 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32h7xx_it.h"
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#include "bq24072.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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///////////////////////////////////////////////////////////////////////////////
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// Inspired by
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// Source: https://github.com/memfault/interrupt/blob/master/example/cortex-m-fault-debug/startup.c
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// License: Content released under CC-by-SA license
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// Copyright (c) 2019 Memfault, Inc.
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typedef struct __attribute__((packed)) ContextStateFrame {
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uint32_t r0;
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uint32_t r1;
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uint32_t r2;
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uint32_t r3;
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uint32_t r12;
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uint32_t lr;
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uint32_t return_address;
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uint32_t xpsr;
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} sContextStateFrame;
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__attribute__((optimize("O0")))
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void common_fault_handler_c(sContextStateFrame *frame, int type)
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{
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BSOD(type, frame->return_address, frame->lr);
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}
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#define HARDFAULT_HANDLING_ASM(_x) \
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__asm volatile( \
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"tst lr, #4 \n" \
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"ite eq \n" \
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"mrseq r0, msp \n" \
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"mrsne r0, psp \n" \
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"movs r1, %0 \n" \
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"b common_fault_handler_c \n" \
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: : "r" (_x) )
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///////////////////////////////////////////////////////////////////////////////
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern ADC_HandleTypeDef hadc1;
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extern OSPI_HandleTypeDef hospi1;
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extern DMA_HandleTypeDef hdma_sai1_a;
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extern SAI_HandleTypeDef hsai_BlockA1;
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extern LTDC_HandleTypeDef hltdc;
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extern TIM_HandleTypeDef htim1;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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HARDFAULT_HANDLING_ASM(BSOD_HARDFAULT);
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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HARDFAULT_HANDLING_ASM(BSOD_MEMFAULT);
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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HARDFAULT_HANDLING_ASM(BSOD_BUSFAULT);
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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HARDFAULT_HANDLING_ASM(BSOD_USAGEFAULT);
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn 0 */
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/* USER CODE END SVCall_IRQn 0 */
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/* USER CODE BEGIN SVCall_IRQn 1 */
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/* USER CODE END SVCall_IRQn 1 */
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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/* USER CODE BEGIN SysTick_IRQn 1 */
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32H7xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32h7xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles EXTI line2 interrupt.
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*/
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void EXTI2_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI2_IRQn 0 */
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if(__HAL_GPIO_EXTI_GET_FLAG(GPIO_PIN_2))
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{
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bq24072_handle_power_good();
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}
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/* USER CODE END EXTI2_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
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/* USER CODE BEGIN EXTI2_IRQn 1 */
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__HAL_GPIO_EXTI_CLEAR_FLAG(GPIO_PIN_2);
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/* USER CODE END EXTI2_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream0 global interrupt.
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*/
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void DMA1_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
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/* USER CODE END DMA1_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_sai1_a);
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/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
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/* USER CODE END DMA1_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles ADC1 and ADC2 global interrupts.
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*/
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void ADC_IRQHandler(void)
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{
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/* USER CODE BEGIN ADC_IRQn 0 */
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/* USER CODE END ADC_IRQn 0 */
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HAL_ADC_IRQHandler(&hadc1);
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/* USER CODE BEGIN ADC_IRQn 1 */
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/* USER CODE END ADC_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line[9:5] interrupts.
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*/
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void EXTI9_5_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI9_5_IRQn 0 */
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if(__HAL_GPIO_EXTI_GET_FLAG(GPIO_PIN_7))
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{
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bq24072_handle_charging();
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}
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/* USER CODE END EXTI9_5_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7);
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/* USER CODE BEGIN EXTI9_5_IRQn 1 */
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__HAL_GPIO_EXTI_CLEAR_FLAG(GPIO_PIN_7);
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/* USER CODE END EXTI9_5_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 update interrupt.
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*/
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void TIM1_UP_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_UP_IRQn 0 */
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//uptime_inc();
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bq24072_poll();
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/* USER CODE END TIM1_UP_IRQn 0 */
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HAL_TIM_IRQHandler(&htim1);
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/* USER CODE BEGIN TIM1_UP_IRQn 1 */
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/* USER CODE END TIM1_UP_IRQn 1 */
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}
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/**
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* @brief This function handles SAI1 global interrupt.
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*/
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void SAI1_IRQHandler(void)
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{
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/* USER CODE BEGIN SAI1_IRQn 0 */
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/* USER CODE END SAI1_IRQn 0 */
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HAL_SAI_IRQHandler(&hsai_BlockA1);
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/* USER CODE BEGIN SAI1_IRQn 1 */
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/* USER CODE END SAI1_IRQn 1 */
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}
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/**
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* @brief This function handles LTDC global interrupt.
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*/
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void LTDC_IRQHandler(void)
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{
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/* USER CODE BEGIN LTDC_IRQn 0 */
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/* USER CODE END LTDC_IRQn 0 */
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HAL_LTDC_IRQHandler(&hltdc);
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/* USER CODE BEGIN LTDC_IRQn 1 */
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/* USER CODE END LTDC_IRQn 1 */
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}
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/**
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* @brief This function handles OCTOSPI1 global interrupt.
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*/
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void OCTOSPI1_IRQHandler(void)
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{
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/* USER CODE BEGIN OCTOSPI1_IRQn 0 */
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/* USER CODE END OCTOSPI1_IRQn 0 */
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HAL_OSPI_IRQHandler(&hospi1);
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/* USER CODE BEGIN OCTOSPI1_IRQn 1 */
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/* USER CODE END OCTOSPI1_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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