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Fix incorrect sign in disassembly
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parent
190a55e032
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015b3228f8
@ -46,7 +46,7 @@ def extend_sign(value, bits=16):
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def ihex(value):
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sign = "-" if value < 0 else ""
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return "%s0x%X" %(sign, value)
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return "%s0x%X" %(sign, abs(value))
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condition_table_true = ["lt", "gt", "eq"]
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@ -231,7 +231,7 @@ def decode_compare_float(instr):
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def decode_memory(instr):
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def decode(value, addr):
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D, A, d = decodeD(value)
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A = extend_sign(A)
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d = extend_sign(d)
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return instr, "r%i, %s(r%i)" %(D, ihex(d), A)
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return decode
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