mirror of
https://github.com/isfshax/isfshax.git
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119 lines
3.0 KiB
C
119 lines
3.0 KiB
C
/*
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* minute - a port of the "mini" IOS replacement for the Wii U.
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*
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* Copyright (C) 2016 SALT
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* Copyright (C) 2016 Daz Jones <daz@dazzozo.com>
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*
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* This code is licensed to you under the terms of the GNU GPL, version 2;
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* see file COPYING or http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
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*/
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#include "types.h"
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#include "utils.h"
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#include "latte.h"
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void SRAM_TEXT __attribute__((__noreturn__)) smc_shutdown(bool reset)
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{
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write16(MEM_FLUSH_MASK, 0b1111);
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while(read16(MEM_FLUSH_MASK) & 0b1111);
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if(read32(LT_RESETS) & 4) {
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write32(LT_ABIF_CPLTL_OFFSET, 0xC0008020);
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write32(LT_ABIF_CPLTL_DATA, 0xFFFFFFFF);
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write32(LT_ABIF_CPLTL_OFFSET, 0xC0000E60);
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write32(LT_ABIF_CPLTL_DATA, 0xFFFFFFDB);
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}
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write32(LT_RESETS_AHB, 0xFFFFCE71);
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write32(LT_RESETS_AHMN, 0xFFFFCD70);
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write32(LT_RESETS_COMPAT, 0xFF8FCDEF);
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write16(MEM_REFRESH_FLAG, 0);
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write16(MEM_SEQ_REG_ADDR, 0x18);
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write16(MEM_SEQ_REG_VAL, 1);
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write16(MEM_SEQ_REG_ADDR, 0x19);
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write16(MEM_SEQ_REG_VAL, 0);
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write16(MEM_SEQ_REG_ADDR, 0x1A);
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write16(MEM_SEQ_REG_VAL, 1);
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write16(MEM_SEQ0_REG_ADDR, 0x18);
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write16(MEM_SEQ0_REG_VAL, 1);
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write16(MEM_SEQ0_REG_ADDR, 0x19);
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write16(MEM_SEQ0_REG_VAL, 0);
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write16(MEM_SEQ0_REG_ADDR, 0x1A);
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write16(MEM_SEQ0_REG_VAL, 1);
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{
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0xA1000100);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0);
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}
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if(reset) {
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{
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0xA1000D00);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0x501);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0);
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}
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clear32(LT_RESETS, 1);
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} else {
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{
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0xA1000D00);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0x101);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0);
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}
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{
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0xA1000D00);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0x108);
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write32(EXI0_DATA, 0x10101);
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write32(EXI0_CR, 0x35);
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while(!(read32(EXI0_CSR) & 8));
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write32(EXI0_CSR, 0);
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}
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}
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while(true);
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}
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void __attribute__((__noreturn__)) smc_power_off(void)
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{
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smc_shutdown(false);
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}
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void __attribute__((__noreturn__)) smc_reset(void)
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{
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smc_shutdown(true);
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}
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