diff --git a/source/disc_io/io_scsd.c b/source/disc_io/io_scsd.c index 76f107d..bd9b9f4 100644 --- a/source/disc_io/io_scsd.c +++ b/source/disc_io/io_scsd.c @@ -42,6 +42,9 @@ 2006-08-07 - Chishm * Moved the SD initialization to a common function + + 2006-08-19 - Chishm + * Added SuperCard Lite support */ #include "io_scsd.h" @@ -54,10 +57,11 @@ /* bit 0: command bit to read */ /* bit 7: command bit to write */ -#define REG_SCSD_DATAWRITE (*(vu16*)(0x09000000)) -#define REG_SCSD_DATAREAD (*(vu16*)(0x09100000)) -#define REG_SCSD_DATAREAD_32 (*(vu32*)(0x09100000)) -#define REG_SCSD_LOCK (*(vu16*)(0x09FFFFFE)) +#define REG_SCSD_DATAWRITE (*(vu16*)(0x09000000)) +#define REG_SCSD_DATAREAD (*(vu16*)(0x09100000)) +#define REG_SCSD_DATAREAD_32 (*(vu32*)(0x09100000)) +#define REG_SCSD_LITE_ENABLE (*(vu16*)(0x09440000)) +#define REG_SCSD_LOCK (*(vu16*)(0x09FFFFFE)) /* bit 0: 1 */ /* bit 1: enable IO interface (SD,CF) */ /* bit 2: enable R/W SDRAM access */ @@ -87,6 +91,10 @@ static inline void _SCSD_unlock (void) { _SC_changeMode (SC_MODE_MEDIA); } +static inline void _SCSD_enable_lite (void) { + REG_SCSD_LITE_ENABLE = 0; +} + static bool _SCSD_sendCommand (u8 command, u32 argument) { u8 databuff[6]; u8 *tempDataPtr = databuff; @@ -228,6 +236,8 @@ static bool _SCSD_readData (void* buffer) { volatile register u32 temp; int i; + _SCSD_enable_lite(); + i = BUSY_WAIT_TIMEOUT; while ((REG_SCSD_DATAREAD & SCSD_STS_BUSY) && (--i)); if (i == 0) { @@ -329,6 +339,8 @@ bool _SCSD_writeSectors (u32 sector, u32 numSectors, const void* buffer) { int i; while (numSectors--) { + _SCSD_enable_lite (); + // Calculate the CRC16 _SD_CRC16 ( data, BYTES_PER_READ, (u8*)crc); diff --git a/source/disc_io/io_scsd_s.s b/source/disc_io/io_scsd_s.s index c3c633c..2b68d3f 100644 --- a/source/disc_io/io_scsd_s.s +++ b/source/disc_io/io_scsd_s.s @@ -32,6 +32,9 @@ @ 2006-07-22 - Chishm @ * First release of stable code @ +@ 2006-08-19 - Chishm +@ * Added SuperCard Lite support +@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ .align 4 @@ -86,10 +89,18 @@ _SCSD_writeData_data_loop_unaligned: @ Write the data to the card @ 4 halfwords are transmitted to the Supercard at once, for timing purposes -@ Only the first halfword needs to contain data +@ Only the first halfword needs to contain data for standard SuperCards +@ For the SuperCard Lite, the data is split into 4 nibbles, one per halfword _SCSD_writeData_data_loop: ldrh r3, [r0], #2 + +@ This bit added for SCLite. Notice that the shift is not the same as in +@ the original (buggy) code supplied by Romman + add r3, r3, r3, lsl #20 + mov r4, r3, lsr #8 + stmia r2, {r3-r4} + subs r5, r5, #2 bne _SCSD_writeData_data_loop