mirror of
https://github.com/fail0verflow/mini.git
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125 lines
1.7 KiB
ArmAsm
125 lines
1.7 KiB
ArmAsm
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.globl v_undf
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.globl v_swi
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.globl v_instr_abrt
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.globl v_data_abrt
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.globl v_reserved
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.globl v_fiq
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.globl exc_setup_stack
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.extern __excstack_addr
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.extern exc_handler
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exc_setup_stack:
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mrs r0, cpsr
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@ Switch to FIQ mode
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msr cpsr_c, #0xd1
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@ Setup exception stack
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ldr sp, =__excstack_addr
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@ Switch to SVC mode
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msr cpsr_c, #0xd3
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@ Setup exception stack
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ldr sp, =__excstack_addr
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@ Switch to ABORT mode
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msr cpsr_c, #0xd7
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@ Setup exception stack
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ldr sp, =__excstack_addr
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@ Switch to UNDF mode
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msr cpsr_c, #0xdb
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@ Setup exception stack
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ldr sp, =__excstack_addr
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@ Restore mode
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msr cpsr_c, r0
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bx lr
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.pool
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v_undf:
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stmfd sp!, {lr}
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stmfd sp, {r0-lr}^
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sub sp, sp, #0x3c
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mov r2, sp
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mrs r1, spsr
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mov r0, #1
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blx exc_handler
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ldmfd sp!, {r0-r12}
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add sp, sp, #8
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movs pc, lr
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v_swi:
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stmfd sp!, {lr}
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stmfd sp, {r0-lr}^
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sub sp, sp, #0x3c
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mov r2, sp
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mrs r1, spsr
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mov r0, #2
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blx exc_handler
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ldmfd sp!, {r0-r12}
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add sp, sp, #8
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movs pc, lr
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v_instr_abrt:
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stmfd sp!, {lr}
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stmfd sp, {r0-lr}^
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sub sp, sp, #0x3c
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mov r2, sp
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mrs r1, spsr
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mov r0, #3
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blx exc_handler
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ldmfd sp!, {r0-r12}
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add sp, sp, #8
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subs pc, lr, #4
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v_data_abrt:
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stmfd sp!, {lr}
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stmfd sp, {r0-lr}^
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sub sp, sp, #0x3c
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mov r2, sp
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mrs r1, spsr
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mov r0, #4
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blx exc_handler
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ldmfd sp!, {r0-r12}
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add sp, sp, #8
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subs pc, lr, #8
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v_reserved:
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stmfd sp!, {lr}
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stmfd sp, {r0-lr}^
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sub sp, sp, #0x3c
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mov r2, sp
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mrs r1, spsr
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mov r0, #5
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blx exc_handler
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ldmfd sp!, {r0-r12}
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add sp, sp, #8
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movs pc, lr
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v_fiq:
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stmfd sp!, {lr}
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stmfd sp, {r0-lr}^
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sub sp, sp, #0x3c
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mov r2, sp
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mrs r1, spsr
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mov r0, #7
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blx exc_handler
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ldmfd sp!, {r0-r12}
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add sp, sp, #8
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subs pc, lr, #4
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