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Make sdhc.c use dma_addr also
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parent
c5e8bf0b9b
commit
766e793372
6
sdhc.c
6
sdhc.c
@ -602,12 +602,12 @@ static s32 __sd_cmd(sdhci_t *sdhci, u32 cmd, u32 type, u32 arg, u32 blk_cnt, voi
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else
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else
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dc_invalidaterange(buffer, blk_cnt * BLOCK_SIZE);
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dc_invalidaterange(buffer, blk_cnt * BLOCK_SIZE);
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__sd_write32(sdhci->reg_base + SDHC_SDMA_ADDR, (u32)buffer);
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__sd_write32(sdhci->reg_base + SDHC_SDMA_ADDR, dma_addr(buffer));
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__sd_write16(sdhci->reg_base + SDHC_NORMAL_INTERRUPT_STATUS, 0);
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__sd_write16(sdhci->reg_base + SDHC_NORMAL_INTERRUPT_STATUS, 0);
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__sd_write16(sdhci->reg_base + SDHC_ERROR_INTERRUPT_STATUS, 0);
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__sd_write16(sdhci->reg_base + SDHC_ERROR_INTERRUPT_STATUS, 0);
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__sd_write16(sdhci->reg_base + SDHC_NORMAL_INTERRUPT_ENABLE, INTERRUPT_ALL);
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__sd_write16(sdhci->reg_base + SDHC_NORMAL_INTERRUPT_ENABLE, INTERRUPT_ALL);
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__sd_write16(sdhci->reg_base + SDHC_ERROR_INTERRUPT_ENABLE, EINTERRUPT_ALL);
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__sd_write16(sdhci->reg_base + SDHC_ERROR_INTERRUPT_ENABLE, EINTERRUPT_ALL);
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__sd_write32(sdhci->reg_base + SDHC_SDMA_ADDR, (u32 )buffer);
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__sd_write32(sdhci->reg_base + SDHC_SDMA_ADDR, dma_addr(buffer));
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}
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}
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__sd_dumpregs(sdhci);
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__sd_dumpregs(sdhci);
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@ -718,7 +718,7 @@ static s32 __sd_cmd(sdhci_t *sdhci, u32 cmd, u32 type, u32 arg, u32 blk_cnt, voi
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}
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}
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__sd_write16(sdhci->reg_base + SDHC_NORMAL_INTERRUPT_STATUS, INTERRUPT_DMA);
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__sd_write16(sdhci->reg_base + SDHC_NORMAL_INTERRUPT_STATUS, INTERRUPT_DMA);
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__sd_write32(sdhci->reg_base + SDHC_SDMA_ADDR, (u32 )ptr);
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__sd_write32(sdhci->reg_base + SDHC_SDMA_ADDR, dma_addr(ptr));
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sdhc_debug(sdhci->reg_base, "next DMA transfer started.");
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sdhc_debug(sdhci->reg_base, "next DMA transfer started.");
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__sd_dumpregs(sdhci);
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__sd_dumpregs(sdhci);
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