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added code to support IPC for SDHC
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parent
bb5862f67c
commit
902d0adac0
4
ipc.c
4
ipc.c
@ -7,6 +7,7 @@
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#include "gecko.h"
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#include "gecko.h"
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#include "ipc.h"
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#include "ipc.h"
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#include "nand.h"
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#include "nand.h"
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#include "sdhc.h"
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#include "crypto.h"
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#include "crypto.h"
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static volatile ipc_request in_queue[IPC_IN_SIZE] ALIGNED(32) MEM2_BSS;
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static volatile ipc_request in_queue[IPC_IN_SIZE] ALIGNED(32) MEM2_BSS;
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@ -96,6 +97,9 @@ static int process_slow(volatile ipc_request *req)
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case IPC_DEV_NAND:
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case IPC_DEV_NAND:
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nand_ipc(req);
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nand_ipc(req);
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break;
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break;
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case IPC_DEV_SD:
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sd_ipc(req);
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break;
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case IPC_DEV_KEYS:
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case IPC_DEV_KEYS:
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crypto_ipc(req);
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crypto_ipc(req);
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break;
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break;
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6
ipc.h
6
ipc.h
@ -37,9 +37,9 @@
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#define IPC_NAND_WRITE 0x0003
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#define IPC_NAND_WRITE 0x0003
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#define IPC_NAND_ERASE 0x0004
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#define IPC_NAND_ERASE 0x0004
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#define IPC_SD_RESET 0x0000
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#define IPC_SD_MOUNT 0x0000
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#define IPC_SD_GETSTATUS 0x0001
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#define IPC_SD_SELECT 0x0001
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#define IPC_SD_GETSIZE 0x0002
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#define IPC_SD_GETSTATE 0x0002
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#define IPC_SD_READ 0x0003
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#define IPC_SD_READ 0x0003
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#define IPC_SD_WRITE 0x0004
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#define IPC_SD_WRITE 0x0004
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69
sdhc.c
69
sdhc.c
@ -178,6 +178,22 @@
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#define EINTERRUPT_ALL 0x3ff
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#define EINTERRUPT_ALL 0x3ff
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static int ipc_code = 0;
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static int ipc_tag = 0;
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static sdhci_t sdhci;
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// not currently used :(
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void sd_irq(void)
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{
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int code, tag;
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if (ipc_code != 0) {
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code = ipc_code;
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tag = ipc_tag;
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ipc_code = ipc_tag = 0;
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ipc_post(code, tag, 0);
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}
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}
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u8 __sd_read8(u32 addr)
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u8 __sd_read8(u32 addr)
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{
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{
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u32 mask;
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u32 mask;
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@ -449,7 +465,7 @@ static int __sd_power(sdhci_t *sdhci, int vdd)
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if(!(caps & vdd))
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if(!(caps & vdd))
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{
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{
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sdhc_error(sdhci->reg_base, "voltage %x not supported by the hc");
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sdhc_error(sdhci->reg_base, "voltage %x not supported by the hc", vdd);
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return SDHC_EINVAL;
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return SDHC_EINVAL;
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}
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}
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@ -1046,3 +1062,54 @@ int sd_write(sdhci_t *sdhci, u32 start_block, u32 blk_cnt, const void *buffer)
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}
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}
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#endif
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#endif
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void sd_initialize(void)
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{
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ipc_code = ipc_tag = 0;
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sd_init(&sdhci, 0);
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// irq_enable(IRQ_NAND); ??
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}
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void sd_ipc(volatile ipc_request *req)
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{
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int retval = 0;
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if (ipc_code != 0 || ipc_tag != 0) {
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gecko_printf("SDHC: previous IPC request is not done yet.");
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ipc_post(req->code, req->tag, 1, -1);
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return;
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}
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switch (req->req) {
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case IPC_SD_MOUNT:
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retval = sd_mount(&sdhci);
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ipc_post(req->code, req->tag, 1, retval);
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break;
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case IPC_SD_SELECT:
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retval = sd_select(&sdhci);
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ipc_post(req->code, req->tag, 1, retval);
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break;
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case IPC_SD_GETSTATE:
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retval = __sd_read32(sdhci.reg_base + SDHC_PRESENT_STATE);
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ipc_post(req->code, req->tag, 1, retval);
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break;
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case IPC_SD_READ:
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retval = sd_read(&sdhci, req->args[0], req->args[1],
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(void *)req->args[2]);
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ipc_post(req->code, req->tag, 1, retval);
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break;
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case IPC_SD_WRITE:
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retval = sd_write(&sdhci, req->args[0], req->args[1],
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(void *)req->args[2]);
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ipc_post(req->code, req->tag, 1, retval);
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break;
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default:
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gecko_printf("IPC: unknown SLOW NAND request %04x\n",
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req->req);
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}
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}
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6
sdhc.h
6
sdhc.h
@ -2,6 +2,7 @@
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#define __SDHC_H__
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#define __SDHC_H__
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#include "types.h"
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#include "types.h"
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#include "ipc.h"
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#define SDHC_ENOCARD -0x1001
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#define SDHC_ENOCARD -0x1001
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#define SDHC_ESTRANGE -0x1002
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#define SDHC_ESTRANGE -0x1002
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@ -33,6 +34,11 @@ int sd_select(sdhci_t *sdhci);
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int sd_read(sdhci_t *sdhci, u32 start_block, u32 blk_cnt, void *buffer);
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int sd_read(sdhci_t *sdhci, u32 start_block, u32 blk_cnt, void *buffer);
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int sd_write(sdhci_t *sdhci, u32 start_block, u32 blk_cnt, const void *buffer);
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int sd_write(sdhci_t *sdhci, u32 start_block, u32 blk_cnt, const void *buffer);
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void sd_irq(void);
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void sd_initialize();
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void sd_ipc(volatile ipc_request *req);
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u8 __sd_read8(u32 addr);
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u8 __sd_read8(u32 addr);
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u16 __sd_read16(u32 addr);
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u16 __sd_read16(u32 addr);
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u32 __sd_read32(u32 addr);
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u32 __sd_read32(u32 addr);
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