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merge loader/sdhc.c and mini/sdhc.c
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8366174042
commit
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16
sdhc.c
16
sdhc.c
@ -382,7 +382,10 @@ sdhc_host_reset(sdmmc_chipset_handle_t sch)
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HWRITE1(hp, SDHC_TIMEOUT_CTL, SDHC_TIMEOUT_MAX);
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HWRITE1(hp, SDHC_TIMEOUT_CTL, SDHC_TIMEOUT_MAX);
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/* Enable interrupts. */
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/* Enable interrupts. */
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imask = SDHC_CARD_REMOVAL | SDHC_CARD_INSERTION |
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imask =
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#ifndef LOADER
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SDHC_CARD_REMOVAL | SDHC_CARD_INSERTION |
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#endif
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SDHC_BUFFER_READ_READY | SDHC_BUFFER_WRITE_READY |
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SDHC_BUFFER_READ_READY | SDHC_BUFFER_WRITE_READY |
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SDHC_DMA_INTERRUPT | SDHC_BLOCK_GAP_EVENT |
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SDHC_DMA_INTERRUPT | SDHC_BLOCK_GAP_EVENT |
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SDHC_TRANSFER_COMPLETE | SDHC_COMMAND_COMPLETE;
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SDHC_TRANSFER_COMPLETE | SDHC_COMMAND_COMPLETE;
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@ -924,17 +927,12 @@ sdhc_intr(void *arg)
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/* Acknowledge error interrupts. */
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/* Acknowledge error interrupts. */
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error = HREAD2(hp, SDHC_EINTR_STATUS);
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error = HREAD2(hp, SDHC_EINTR_STATUS);
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/* IOS does this */
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if (error == 0) {
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signal = HREAD2(hp, SDHC_EINTR_SIGNAL_EN);
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signal = HREAD2(hp, SDHC_EINTR_SIGNAL_EN);
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HWRITE2(hp, SDHC_EINTR_SIGNAL_EN, 0);
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HWRITE2(hp, SDHC_EINTR_SIGNAL_EN, 0);
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(void)sdhc_soft_reset(hp, SDHC_RESET_DAT|SDHC_RESET_CMD);
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(void)sdhc_soft_reset(hp, SDHC_RESET_DAT|SDHC_RESET_CMD);
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HWRITE2(hp, SDHC_EINTR_STATUS, 0xffff);
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HWRITE2(hp, SDHC_EINTR_SIGNAL_EN, signal);
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}
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else
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HWRITE2(hp, SDHC_EINTR_STATUS, error);
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HWRITE2(hp, SDHC_EINTR_STATUS, error);
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HWRITE2(hp, SDHC_EINTR_SIGNAL_EN, signal);
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// DPRINTF(2,("%s: error interrupt, status=%d\n",
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// DPRINTF(2,("%s: error interrupt, status=%d\n",
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// HDEVNAME(hp), error));
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// HDEVNAME(hp), error));
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@ -945,6 +943,7 @@ sdhc_intr(void *arg)
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}
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}
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}
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}
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#ifdef CAN_HAZ_IPC
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/*
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/*
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* Wake up the sdmmc event thread to scan for cards.
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* Wake up the sdmmc event thread to scan for cards.
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*/
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*/
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@ -954,6 +953,7 @@ sdhc_intr(void *arg)
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ipc_enqueue_slow(IPC_DEV_SDHC, IPC_SDHC_DISCOVER, 1,
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ipc_enqueue_slow(IPC_DEV_SDHC, IPC_SDHC_DISCOVER, 1,
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(u32) hp->sdmmc);
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(u32) hp->sdmmc);
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}
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}
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#endif
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/*
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/*
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* Wake up the blocking process to service command
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* Wake up the blocking process to service command
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