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https://github.com/fail0verflow/mini.git
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154 lines
3.1 KiB
C
154 lines
3.1 KiB
C
/*
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mini - a Free Software replacement for the Nintendo/BroadOn IOS.
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BC support code
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Copyright (C) 2009 Haxx Enterprises <bushing@gmail.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, version 2.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "types.h"
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#include "memory.h"
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#include "powerpc.h"
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#include "hollywood.h"
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#include "utils.h"
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#include "start.h"
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#include "gecko.h"
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#if 0
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void powerpc_upload_stub(u32 entry)
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{
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u32 i;
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set32(HW_EXICTRL, EXICTRL_ENABLE_EXI);
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// lis r3, entry@h
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write32(EXI_BOOT_BASE + 4 * 0, 0x3c600000 | entry >> 16);
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// ori r3, r3, entry@l
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write32(EXI_BOOT_BASE + 4 * 1, 0x60630000 | (entry & 0xffff));
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// mtsrr0 r3
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write32(EXI_BOOT_BASE + 4 * 2, 0x7c7a03a6);
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// li r3, 0
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write32(EXI_BOOT_BASE + 4 * 3, 0x38600000);
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// mtsrr1 r3
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write32(EXI_BOOT_BASE + 4 * 4, 0x7c7b03a6);
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// rfi
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write32(EXI_BOOT_BASE + 4 * 5, 0x4c000064);
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for (i = 6; i < 0x10; ++i)
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write32(EXI_BOOT_BASE + 4 * i, 0);
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set32(HW_DIFLAGS, DIFLAGS_BOOT_CODE);
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gecko_printf("disabling EXI now...\n");
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clear32(HW_EXICTRL, EXICTRL_ENABLE_EXI);
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}
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void powerpc_hang()
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{
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clear32(HW_RESETS, 0x30);
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udelay(100);
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set32(HW_RESETS, 0x20);
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udelay(100);
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}
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void powerpc_reset()
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{
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// enable the broadway IPC interrupt
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write32(HW_PPCIRQMASK, (1<<30));
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clear32(HW_RESETS, 0x30);
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udelay(100);
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set32(HW_RESETS, 0x20);
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udelay(100);
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set32(HW_RESETS, 0x10);
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udelay(100000);
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set32(HW_EXICTRL, EXICTRL_ENABLE_EXI);
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}
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#endif
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void toggle_ppc1_ppc2(void)
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{
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u32 d = read32(HW_RESETS);
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write32(HW_RESETS, d & ~0x30);
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udelay(15);
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write32(HW_RESETS, d & ~0x10);
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}
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void clear_resets_i_l(void)
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{
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}
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void clear_184_438e(void)
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{
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}
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void hw_bus_freq_craps(void)
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{
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}
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void call_init_dram(int r0, int r1)
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{
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}
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void set_hwresets_i_l(void)
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{
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}
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void clear_hwresets_i_l(void)
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{
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}
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void set_184_438e(void)
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{
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}
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void twiddle_dram_regs(int r0, int r1)
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{
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}
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void bc_main(void) {
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toggle_ppc1_ppc2();
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clear_hwresets_i_l();
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clear_184_438e();
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hw_bus_freq_craps();
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call_init_dram(1,0);
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set_hwresets_i_l();
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set_184_438e();
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twiddle_dram_regs(1,1);
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write32(HW_PPCIRQFLAG, 1 << 15);
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udelay(200);
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mem_setswap_bc();
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}
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#if 0
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void powerpc_ipc(volatile ipc_request *req)
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{
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switch (req->req) {
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case IPC_PPC_BOOT:
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if (req->args[0]) {
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// Enqueued from ARM side, do not invalidate mem nor ipc_post
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powerpc_boot_mem((u8 *) req->args[1], req->args[2]);
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} else {
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dc_invalidaterange((void *) req->args[1], req->args[2]);
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int res = powerpc_boot_mem((u8 *) req->args[1], req->args[2]);
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if (res)
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ipc_post(req->code, req->tag, 1, res);
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}
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break;
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default:
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gecko_printf("IPC: unknown SLOW PPC request %04X\n", req->req);
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}
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}
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#endif
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