mirror of
https://github.com/fail0verflow/mini.git
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127 lines
1.7 KiB
ArmAsm
127 lines
1.7 KiB
ArmAsm
.arm
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.extern _main
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.extern __got_start
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.extern __got_end
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.extern __bss_start
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.extern __bss_end
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.extern __stack_addr
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.globl _start
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.globl debug_output
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.globl panic
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.globl delay
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.section .init
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_vectors:
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_start:
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ldr pc, =v_reset
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ldr pc, =v_undf
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ldr pc, =v_swi
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ldr pc, =v_instr_abrt
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ldr pc, =v_data_abrt
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ldr pc, =v_reserved
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ldr pc, =v_irq
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ldr pc, =v_fiq
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.pool
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v_reset:
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@ Get loader base from ELF loader
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mov r4, r0
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@ Output 0x42 to the debug port
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mov r0, #0x42
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bl debug_output
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@ Set up a stack
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ldr sp, =__stack_addr
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add sp, r4
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@ clear BSS
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ldr r1, =__bss_start
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add r1, r4
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ldr r2, =__bss_end
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add r2, r4
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mov r3, #0
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bss_loop:
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@ check for the end
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cmp r1, r2
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beq done_bss
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@ clear the word and move on
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str r3, [r1]
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add r1, r1, #4
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b bss_loop
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done_bss:
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mov r0, #0x84
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bl debug_output
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@ take the plunge
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mov r0, r4
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bl _main
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@ _main returned! Go to whatever address it returned...
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mov pc, r0
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.pool
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v_undf:
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b v_undf
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v_swi:
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b v_swi
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v_instr_abrt:
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b v_instr_abrt
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v_data_abrt:
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b v_data_abrt
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v_reserved:
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b v_reserved
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v_irq:
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b v_irq
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v_fiq:
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b v_fiq
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debug_output:
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@ load address of port
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mov r3, #0xd800000
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@ load old value
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ldr r2, [r3, #0xe0]
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@ clear debug byte
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bic r2, r2, #0xFF0000
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@ insert new value
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and r0, r0, #0xFF
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orr r2, r2, r0, LSL #16
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@ store back
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str r2, [r3, #0xe0]
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mov pc, lr
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panic:
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mov r4, r0
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_panic:
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mov r0, r4
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bl debug_output
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ldr r0, =6175000
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bl delay
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mov r0, #0x00
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bl debug_output
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ldr r0, =6175000
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bl delay
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b _panic
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@ the speed of this seems to decrease wildly with certain (non-)alignments
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@ probably some prefetch buffer / cache / DRAM junk
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.balign 64
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delay:
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cmp r0, #0
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moveq pc, lr
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1:
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subs r0, r0, #1
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bne 1b
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mov pc, lr
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.pool
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