Add semaphore release debug logs

This commit is contained in:
Billy Laws 2022-06-02 22:02:59 +01:00
parent 55cddc7a66
commit 0202bf5531
3 changed files with 29 additions and 12 deletions

View File

@ -30,16 +30,19 @@ namespace skyline::soc::gm20b::engine {
}) })
ENGINE_STRUCT_CASE(semaphore, action, { ENGINE_STRUCT_CASE(semaphore, action, {
u64 address{registers.semaphore->address};
// Write timestamp first to ensure ordering // Write timestamp first to ensure ordering
if (action.releaseSize == Registers::Semaphore::ReleaseSize::SixteenBytes) { if (action.releaseSize == Registers::Semaphore::ReleaseSize::SixteenBytes) {
channelCtx.asCtx->gmmu.Write<u32>(registers.semaphore->address + 4, 0); channelCtx.asCtx->gmmu.Write<u32>(address + 4, 0);
channelCtx.asCtx->gmmu.Write(registers.semaphore->address + 8, GetGpuTimeTicks()); channelCtx.asCtx->gmmu.Write(address + 8, GetGpuTimeTicks());
} }
if (action.operation == Registers::Semaphore::Operation::Release) { if (action.operation == Registers::Semaphore::Operation::Release) {
channelCtx.asCtx->gmmu.Write(registers.semaphore->address, registers.semaphore->payload); channelCtx.asCtx->gmmu.Write(address, registers.semaphore->payload);
Logger::Debug("SemaphoreRelease: address: 0x{:X} payload: {}", address, registers.semaphore->payload);
} else if (action.operation == Registers::Semaphore::Operation::Reduction) { } else if (action.operation == Registers::Semaphore::Operation::Reduction) {
u32 origVal{channelCtx.asCtx->gmmu.Read<u32>(registers.semaphore->address)}; u32 origVal{channelCtx.asCtx->gmmu.Read<u32>(address)};
bool isSigned{action.format == Registers::Semaphore::Format::Signed}; bool isSigned{action.format == Registers::Semaphore::Format::Signed};
// https://github.com/NVIDIA/open-gpu-doc/blob/b7d1bd16fe62135ebaec306b39dfdbd9e5657827/manuals/turing/tu104/dev_pbdma.ref.txt#L3549 // https://github.com/NVIDIA/open-gpu-doc/blob/b7d1bd16fe62135ebaec306b39dfdbd9e5657827/manuals/turing/tu104/dev_pbdma.ref.txt#L3549
@ -72,8 +75,10 @@ namespace skyline::soc::gm20b::engine {
return (origVal == 0 || origVal > payload) ? payload : origVal - 1; return (origVal == 0 || origVal > payload) ? payload : origVal - 1;
} }
}(registers.semaphore->action.reduction, origVal, registers.semaphore->payload, isSigned)}; }(registers.semaphore->action.reduction, origVal, registers.semaphore->payload, isSigned)};
Logger::Debug("SemaphoreReduction: address: 0x{:X} op: {} payload: {} original value: {} reduced value: {}",
address, static_cast<u8>(registers.semaphore->action.reduction), registers.semaphore->payload, origVal, val);
channelCtx.asCtx->gmmu.Write(registers.semaphore->address, val); channelCtx.asCtx->gmmu.Write(address, val);
} else { } else {
Logger::Warn("Unimplemented semaphore operation: 0x{:X}", static_cast<u8>(registers.semaphore->action.operation)); Logger::Warn("Unimplemented semaphore operation: 0x{:X}", static_cast<u8>(registers.semaphore->action.operation));
} }

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@ -754,15 +754,21 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
} }
void Maxwell3D::WriteSemaphoreResult(u64 result) { void Maxwell3D::WriteSemaphoreResult(u64 result) {
u64 address{registers.semaphore->address};
switch (registers.semaphore->info.structureSize) { switch (registers.semaphore->info.structureSize) {
case type::SemaphoreInfo::StructureSize::OneWord: case type::SemaphoreInfo::StructureSize::OneWord:
channelCtx.asCtx->gmmu.Write(registers.semaphore->address, static_cast<u32>(result)); channelCtx.asCtx->gmmu.Write(address, static_cast<u32>(result));
Logger::Debug("address: 0x{:X} payload: {}", address, result);
break; break;
case type::SemaphoreInfo::StructureSize::FourWords: { case type::SemaphoreInfo::StructureSize::FourWords: {
// Write timestamp first to ensure correct ordering // Write timestamp first to ensure correct ordering
channelCtx.asCtx->gmmu.Write(registers.semaphore->address + 8, GetGpuTimeTicks()); u64 timestamp{GetGpuTimeTicks()};
channelCtx.asCtx->gmmu.Write(registers.semaphore->address, result); channelCtx.asCtx->gmmu.Write(address + 8, timestamp);
channelCtx.asCtx->gmmu.Write(address, result);
Logger::Debug("address: 0x{:X} payload: {} timestamp: {}", address, result, timestamp);
break; break;
} }
} }

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@ -61,15 +61,21 @@ namespace skyline::soc::gm20b::engine {
if (registers.launchDma->reductionEnable) if (registers.launchDma->reductionEnable)
Logger::Warn("Semaphore reduction is unimplemented!"); Logger::Warn("Semaphore reduction is unimplemented!");
u64 address{registers.semaphore->address};
u64 payload{registers.semaphore->payload};
switch (registers.launchDma->semaphoreType) { switch (registers.launchDma->semaphoreType) {
case Registers::LaunchDma::SemaphoreType::ReleaseOneWordSemaphore: case Registers::LaunchDma::SemaphoreType::ReleaseOneWordSemaphore:
channelCtx.asCtx->gmmu.Write(registers.semaphore->address, registers.semaphore->payload); channelCtx.asCtx->gmmu.Write(address, registers.semaphore->payload);
Logger::Debug("address: 0x{:X} payload: {}", address, payload);
break; break;
case Registers::LaunchDma::SemaphoreType::ReleaseFourWordSemaphore: case Registers::LaunchDma::SemaphoreType::ReleaseFourWordSemaphore: {
// Write timestamp first to ensure correct ordering // Write timestamp first to ensure correct ordering
channelCtx.asCtx->gmmu.Write(registers.semaphore->address + 8, GetGpuTimeTicks()); u64 timestamp{GetGpuTimeTicks()};
channelCtx.asCtx->gmmu.Write(registers.semaphore->address, static_cast<u64>(registers.semaphore->payload)); channelCtx.asCtx->gmmu.Write(address + 8, timestamp);
channelCtx.asCtx->gmmu.Write(address, static_cast<u64>(payload));
Logger::Debug("address: 0x{:X} payload: {} timestamp: {}", address, payload, timestamp);
break; break;
}
default: default:
break; break;
} }