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Commonise maxwell3d guest shader caching code
This commit is contained in:
parent
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commit
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// SPDX-License-Identifier: MPL-2.0
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// Copyright © 2022 Ryujinx Team and Contributors (https://github.com/Ryujinx/)
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// Copyright © 2022 yuzu Team and Contributors (https://github.com/yuzu-emu/)
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// Copyright © 2022 Skyline Team and Contributors (https://github.com/skyline-emu/)
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#include <nce.h>
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#include <kernel/memory.h>
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#include <soc/gm20b/channel.h>
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#include <soc/gm20b/gmmu.h>
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#include <gpu.h>
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#include "shader_cache.h"
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namespace skyline::gpu::interconnect {
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/* Pipeline Stage */
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ShaderBinary ShaderCache::Lookup(InterconnectContext &ctx, u64 programBase, u32 programOffset) {
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lastProgramBase = programBase;
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lastProgramOffset = programOffset;
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auto[blockMapping, blockOffset]{ctx.channelCtx.asCtx->gmmu.LookupBlock(programBase + programOffset)};
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if (!trapExecutionLock)
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trapExecutionLock.emplace(trapMutex);
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// Skip looking up the mirror if it is the same as the one used for the previous update
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if (!mirrorBlock.valid() || !mirrorBlock.contains(blockMapping)) {
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auto mirrorIt{mirrorMap.find(blockMapping.data())};
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if (mirrorIt == mirrorMap.end()) {
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// Allocate a host mirror for the mapping and trap the guest region
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auto newIt{mirrorMap.emplace(blockMapping.data(), std::make_unique<MirrorEntry>(ctx.memory.CreateMirror(blockMapping)))};
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// We need to create the trap after allocating the entry so that we have an `invalid` pointer we can pass in
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auto trapHandle{ctx.nce.CreateTrap(blockMapping, [mutex = &trapMutex]() {
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std::scoped_lock lock{*mutex};
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return;
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}, []() { return true; }, [entry = newIt.first->second.get(), mutex = &trapMutex]() {
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std::unique_lock lock{*mutex, std::try_to_lock};
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if (!lock)
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return false;
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if (++entry->trapCount <= MirrorEntry::SkipTrapThreshold)
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entry->dirty = true;
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return true;
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})};
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// Write only trap
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ctx.nce.TrapRegions(trapHandle, true);
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entry = newIt.first->second.get();
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entry->trap = trapHandle;
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} else {
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entry = mirrorIt->second.get();
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}
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mirrorBlock = blockMapping;
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}
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if (entry->trapCount > MirrorEntry::SkipTrapThreshold && entry->channelSequenceNumber != ctx.channelCtx.channelSequenceNumber) {
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entry->channelSequenceNumber = ctx.channelCtx.channelSequenceNumber;
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entry->dirty = true;
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}
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// If the mirror entry has been written to, clear its shader binary cache and retrap to catch any future writes
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if (entry->dirty) {
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entry->cache.clear();
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entry->dirty = false;
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if (entry->trapCount <= MirrorEntry::SkipTrapThreshold)
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ctx.nce.TrapRegions(*entry->trap, true);
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} else if (auto it{entry->cache.find(blockMapping.data() + blockOffset)}; it != entry->cache.end()) {
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return it->second;
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}
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// entry->mirror may not be a direct mirror of blockMapping and may just contain it as a subregion, so we need to explicitly calculate the offset
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span<u8> blockMappingMirror{blockMapping.data() - mirrorBlock.data() + entry->mirror.data(), blockMapping.size()};
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ShaderBinary binary{};
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// If nothing was in the cache then do a full shader parse
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binary.binary = [](span<u8> mapping) {
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// We attempt to find the shader size by looking for "BRA $" (Infinite Loop) which is used as padding at the end of the shader
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// UAM Shader Compiler Reference: https://github.com/devkitPro/uam/blob/5a5afc2bae8b55409ab36ba45be63fcb73f68993/source/compiler_iface.cpp#L319-L351
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constexpr u64 BraSelf1{0xE2400FFFFF87000F}, BraSelf2{0xE2400FFFFF07000F};
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span<u64> shaderInstructions{mapping.cast<u64, std::dynamic_extent, true>()};
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for (auto it{shaderInstructions.begin()}; it != shaderInstructions.end(); it++) {
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auto instruction{*it};
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if (instruction == BraSelf1 || instruction == BraSelf2) [[unlikely]]
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// It is far more likely that the instruction doesn't match so this is an unlikely case
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return span{shaderInstructions.begin(), it}.cast<u8>();
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}
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return span<u8>{};
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}(blockMappingMirror.subspan(blockOffset));
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binary.baseOffset = programOffset;
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binary.hash = XXH64(binary.binary.data(), binary.binary.size_bytes(), 0);
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entry->cache.insert({blockMapping.data() + blockOffset, binary});
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return binary;
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}
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bool ShaderCache::Refresh(InterconnectContext &ctx, u64 programBase, u32 programOffset) {
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if (!trapExecutionLock)
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trapExecutionLock.emplace(trapMutex);
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if (programBase != lastProgramBase || programOffset != lastProgramOffset)
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return true;
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if (entry && entry->trapCount > MirrorEntry::SkipTrapThreshold && entry->channelSequenceNumber != ctx.channelCtx.channelSequenceNumber)
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return true;
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else if (entry && entry->dirty)
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return true;
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return false;
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}
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void ShaderCache::PurgeCaches() {
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trapExecutionLock.reset();
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}
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}
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@ -0,0 +1,42 @@
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// SPDX-License-Identifier: MPL-2.0
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// Copyright © 2022 Skyline Team and Contributors (https://github.com/skyline-emu/)
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#pragma once
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#include "common.h"
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namespace skyline::gpu::interconnect {
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class ShaderCache {
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private:
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/**
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* @brief Holds mirror state for a single GPU mapped block
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*/
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struct MirrorEntry {
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span<u8> mirror;
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tsl::robin_map<u8 *, ShaderBinary> cache;
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std::optional<nce::NCE::TrapHandle> trap;
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static constexpr u32 SkipTrapThreshold{20}; //!< Threshold for the number of times a mirror trap needs to be hit before we fallback to always hashing
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u32 trapCount{}; //!< The number of times the trap has been hit, used to avoid trapping in cases where the constant retraps would harm performance
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size_t channelSequenceNumber{}; //!< For the case where `trapCount > SkipTrapThreshold`, the memory sequence number number used to clear the cache after every access
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bool dirty{}; //!< If the trap has been hit and the cache needs to be cleared
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MirrorEntry(span<u8> alignedMirror) : mirror{alignedMirror} {}
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};
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tsl::robin_map<u8 *, std::unique_ptr<MirrorEntry>> mirrorMap;
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std::mutex trapMutex; //!< Protects accesses from trap handlers to the mirror map
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std::optional<std::scoped_lock<std::mutex>> trapExecutionLock; //!< Persistently held lock over an execution to avoid frequent relocking
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MirrorEntry *entry{};
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span<u8> mirrorBlock{}; //!< Guest mapped memory block corresponding to `entry`
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u64 lastProgramBase{};
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u32 lastProgramOffset{};
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public:
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ShaderBinary Lookup(InterconnectContext &ctx, u64 programBase, u32 programOffset);
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bool Refresh(InterconnectContext &ctx, u64 programBase, u32 programOffset);
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void PurgeCaches();
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};
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}
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@ -17,11 +17,6 @@ namespace skyline::gpu {
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}
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namespace skyline::gpu::interconnect::maxwell3d {
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struct ShaderBinary {
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span<u8> binary;
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u32 baseOffset;
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};
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class Pipeline {
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public:
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struct ShaderStage {
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@ -255,112 +255,19 @@ namespace skyline::gpu::interconnect::maxwell3d {
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throw exception("Shader type mismatch: {} != {}!", engine->pipeline.shader.type, static_cast<u8>(shaderType));
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if (!engine->pipeline.shader.enable && shaderType != engine::Pipeline::Shader::Type::Vertex) {
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hash = 0;
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binary.hash = 0;
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return;
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}
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auto[blockMapping, blockOffset]{ctx.channelCtx.asCtx->gmmu.LookupBlock(engine->programRegion + engine->pipeline.programOffset)};
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if (!trapExecutionLock)
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trapExecutionLock.emplace(trapMutex);
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// Skip looking up the mirror if it is the same as the one used for the previous update
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if (!mirrorBlock.valid() || !mirrorBlock.contains(blockMapping)) {
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auto mirrorIt{mirrorMap.find(blockMapping.data())};
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if (mirrorIt == mirrorMap.end()) {
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// Allocate a host mirror for the mapping and trap the guest region
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auto newIt{mirrorMap.emplace(blockMapping.data(), std::make_unique<MirrorEntry>(ctx.memory.CreateMirror(blockMapping)))};
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// We need to create the trap after allocating the entry so that we have an `invalid` pointer we can pass in
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auto trapHandle{ctx.nce.CreateTrap(blockMapping, [mutex = &trapMutex]() {
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std::scoped_lock lock{*mutex};
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return;
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}, []() { return true; }, [entry = newIt.first->second.get(), mutex = &trapMutex]() {
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std::unique_lock lock{*mutex, std::try_to_lock};
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if (!lock)
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return false;
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if (++entry->trapCount <= MirrorEntry::SkipTrapThreshold)
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entry->dirty = true;
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return true;
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})};
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// Write only trap
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ctx.nce.TrapRegions(trapHandle, true);
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entry = newIt.first->second.get();
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entry->trap = trapHandle;
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} else {
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entry = mirrorIt->second.get();
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}
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mirrorBlock = blockMapping;
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}
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if (entry->trapCount > MirrorEntry::SkipTrapThreshold && entry->channelSequenceNumber != ctx.channelCtx.channelSequenceNumber) {
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entry->channelSequenceNumber = ctx.channelCtx.channelSequenceNumber;
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entry->dirty = true;
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}
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// If the mirror entry has been written to, clear its shader binary cache and retrap to catch any future writes
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if (entry->dirty) {
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entry->cache.clear();
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entry->dirty = false;
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if (entry->trapCount <= MirrorEntry::SkipTrapThreshold)
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ctx.nce.TrapRegions(*entry->trap, true);
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} else if (auto it{entry->cache.find(blockMapping.data() + blockOffset)}; it != entry->cache.end()) {
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binary = it->second.binary;
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hash = it->second.hash;
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return;
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}
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// entry->mirror may not be a direct mirror of blockMapping and may just contain it as a subregion, so we need to explicitly calculate the offset
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span<u8> blockMappingMirror{blockMapping.data() - mirrorBlock.data() + entry->mirror.data(), blockMapping.size()};
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// If nothing was in the cache then do a full shader parse
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binary.binary = [](span<u8> mapping) {
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// We attempt to find the shader size by looking for "BRA $" (Infinite Loop) which is used as padding at the end of the shader
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// UAM Shader Compiler Reference: https://github.com/devkitPro/uam/blob/5a5afc2bae8b55409ab36ba45be63fcb73f68993/source/compiler_iface.cpp#L319-L351
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constexpr u64 BraSelf1{0xE2400FFFFF87000F}, BraSelf2{0xE2400FFFFF07000F};
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span<u64> shaderInstructions{mapping.cast<u64, std::dynamic_extent, true>()};
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for (auto it{shaderInstructions.begin()}; it != shaderInstructions.end(); it++) {
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auto instruction{*it};
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if (instruction == BraSelf1 || instruction == BraSelf2) [[unlikely]]
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// It is far more likely that the instruction doesn't match so this is an unlikely case
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return span{shaderInstructions.begin(), it}.cast<u8>();
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}
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return span<u8>{};
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}(blockMappingMirror.subspan(blockOffset));
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binary.baseOffset = engine->pipeline.programOffset;
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hash = XXH64(binary.binary.data(), binary.binary.size_bytes(), 0);
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entry->cache.insert({blockMapping.data() + blockOffset, CacheEntry{binary, hash}});
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binary = cache.Lookup(ctx, engine->programRegion, engine->pipeline.programOffset);
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}
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bool PipelineStageState::Refresh(InterconnectContext &ctx) {
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if (!trapExecutionLock)
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trapExecutionLock.emplace(trapMutex);
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if (entry && entry->trapCount > MirrorEntry::SkipTrapThreshold && entry->channelSequenceNumber != ctx.channelCtx.channelSequenceNumber)
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return true;
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else if (entry && entry->dirty)
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return true;
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return false;
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return cache.Refresh(ctx, engine->programRegion, engine->pipeline.programOffset);
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}
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void PipelineStageState::PurgeCaches() {
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trapExecutionLock.reset();
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}
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PipelineStageState::~PipelineStageState() {
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std::scoped_lock lock{trapMutex};
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//for (const auto &mirror : mirrorMap)
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// ctx.nce.DestroyTrap(*mirror.second->trap);
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cache.PurgeCaches();
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}
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/* Vertex Input State */
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@ -584,7 +491,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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std::array<ShaderBinary, engine::PipelineCount> shaderBinaries;
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for (size_t i{}; i < engine::PipelineCount; i++) {
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const auto &stage{pipelineStages[i].UpdateGet(ctx)};
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packedState.shaderHashes[i] = stage.hash;
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packedState.shaderHashes[i] = stage.binary.hash;
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shaderBinaries[i] = stage.binary;
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}
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#include <boost/container/static_vector.hpp>
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#include <gpu/texture/texture.h>
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#include <gpu/interconnect/common/shader_cache.h>
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#include "common.h"
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#include "packed_pipeline_state.h"
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#include "pipeline_manager.h"
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@ -67,46 +68,16 @@ namespace skyline::gpu::interconnect::maxwell3d {
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};
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private:
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struct CacheEntry {
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ShaderBinary binary;
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u64 hash;
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CacheEntry(ShaderBinary binary, u64 hash) : binary{binary}, hash{hash} {}
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};
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/**
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* @brief Holds mirror state for a single GPU mapped block
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*/
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struct MirrorEntry {
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span<u8> mirror;
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tsl::robin_map<u8 *, CacheEntry> cache;
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std::optional<nce::NCE::TrapHandle> trap;
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static constexpr u32 SkipTrapThreshold{20}; //!< Threshold for the number of times a mirror trap needs to be hit before we fallback to always hashing
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u32 trapCount{}; //!< The number of times the trap has been hit, used to avoid trapping in cases where the constant retraps would harm performance
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size_t channelSequenceNumber{}; //!< For the case where `trapCount > SkipTrapThreshold`, the memory sequence number number used to clear the cache after every access
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bool dirty{}; //!< If the trap has been hit and the cache needs to be cleared
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MirrorEntry(span<u8> alignedMirror) : mirror{alignedMirror} {}
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};
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dirty::BoundSubresource<EngineRegisters> engine;
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engine::Pipeline::Shader::Type shaderType;
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tsl::robin_map<u8 *, std::unique_ptr<MirrorEntry>> mirrorMap;
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std::mutex trapMutex; //!< Protects accesses from trap handlers to the mirror map
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std::optional<std::scoped_lock<std::mutex>> trapExecutionLock;
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MirrorEntry *entry{};
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span<u8> mirrorBlock{}; //!< Guest mapped memory block corresponding to `entry`
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ShaderCache cache;
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public:
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ShaderBinary binary;
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u64 hash;
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PipelineStageState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine, u8 shaderType);
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~PipelineStageState();
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void Flush(InterconnectContext &ctx);
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bool Refresh(InterconnectContext &ctx);
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