guest: Add memory barrier after saving context

Forces all registers to be saved before signalling to the kernel that we
are ready; without this the kernel may read incorrect context data
causing undefined behaviour.
This commit is contained in:
Billy Laws 2020-01-22 20:34:00 +00:00 committed by ◱ PixelyIon
parent 00cdc1fd6f
commit 2aebf04b4b

View File

@ -19,6 +19,7 @@ saveCtx:
STP X26, X27, [LR, #224]
STP X28, X29, [LR, #240]
LDR LR, [SP], #16
DSB SY
RET
.global loadCtx