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guest: Add memory barrier after saving context
Forces all registers to be saved before signalling to the kernel that we are ready; without this the kernel may read incorrect context data causing undefined behaviour.
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@ -19,6 +19,7 @@ saveCtx:
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STP X26, X27, [LR, #224]
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STP X28, X29, [LR, #240]
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LDR LR, [SP], #16
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DSB SY
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RET
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.global loadCtx
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