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Determine storage buffer alignment dynamically

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This commit is contained in:
Billy Laws 2022-12-31 23:01:55 +00:00
parent 12d80fe6c2
commit 35a46acbb1
5 changed files with 10 additions and 16 deletions
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7
app/src/main/cpp/skyline/common/address_space.h
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@ -113,10 +113,11 @@ namespace skyline {
std::pair<span<u8>, size_t> LookupBlockLocked(VaType virt, std::function<void(span<u8>)> cpuAccessCallback = {}) {
const auto &blockEntry{this->blockSegmentTable[virt]};
if (blockEntry.phys == nullptr)
return {span<u8>{}, 0};
VaType segmentOffset{virt - blockEntry.virt};
if (blockEntry.extraInfo.sparseMapped || blockEntry.phys == nullptr)
return {span<u8>{static_cast<u8*>(nullptr), blockEntry.extent}, segmentOffset};
span<u8> blockSpan{blockEntry.phys, blockEntry.extent};
if (cpuAccessCallback)
cpuAccessCallback(blockSpan);

9
app/src/main/cpp/skyline/common/address_space.inc
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@ -238,16 +238,7 @@ namespace skyline {
u8 *blockPhys{predecessor->phys + (virt - predecessor->virt)};
VaType blockSize{std::min(successor->virt - virt, size)};
while (size) {
// Return a zeroed out map to emulate sparse mappings
if (predecessor->extraInfo.sparseMapped) {
if (blockSize > SparseMapSize)
throw exception("Size of the sparse map is too small to fit block of size: 0x{:X}", blockSize);
blockPhys = sparseMap;
}
if (predecessor->phys) {
span cpuBlock{blockPhys, blockSize};
if (cpuAccessCallback)

6
app/src/main/cpp/skyline/gpu/interconnect/common/pipeline.inc
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@ -37,14 +37,12 @@ namespace skyline::gpu::interconnect {
u64 address;
u32 size;
};
static constexpr size_t MinAlignment{0x40};
auto ssbo{cbuf.Read<SsboDescriptor>(ctx.executor, desc.cbuf_offset)};
if (ssbo.size == 0)
return BufferBinding{ctx.gpu.megaBufferAllocator.Allocate(ctx.executor.cycle, PAGE_SIZE).buffer, 0, PAGE_SIZE};
size_t padding{ssbo.address & (MinAlignment - 1)};
cachedView.Update(ctx, ssbo.address - padding, util::AlignUp(ssbo.size + padding, MinAlignment));
size_t padding{ssbo.address & (ctx.gpu.traits.minimumStorageBufferAlignment - 1)};
cachedView.Update(ctx, ssbo.address - padding, util::AlignUp(ssbo.size + padding, ctx.gpu.traits.minimumStorageBufferAlignment));
auto view{cachedView.view};
ctx.executor.AttachBuffer(view);

3
app/src/main/cpp/skyline/gpu/trait_manager.cpp
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@ -210,6 +210,9 @@ namespace skyline::gpu {
for (u32 i{}; i < memoryProps.memoryProperties.memoryTypeCount; i++)
if ((memoryProps.memoryProperties.memoryTypes[i].propertyFlags & ReqMemFlags) == ReqMemFlags)
hostVisibleCoherentCachedMemoryType = i;
minimumStorageBufferAlignment = static_cast<u32>(deviceProperties2.get().properties.limits.minStorageBufferOffsetAlignment);
}
std::string TraitManager::Summary() {

1
app/src/main/cpp/skyline/gpu/trait_manager.h
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@ -51,6 +51,7 @@ namespace skyline::gpu {
bool supportsNullDescriptor{}; //!< If the device supports the null descriptor feature in the 'VK_EXT_robustness2' Vulkan extension
u32 subgroupSize{}; //!< Size of a subgroup on the host GPU
u32 hostVisibleCoherentCachedMemoryType{std::numeric_limits<u32>::max()};
u32 minimumStorageBufferAlignment{}; //!< Minimum alignment for storage buffers passed to shaders
std::bitset<7> bcnSupport{}; //!< Bitmask of BCn texture formats supported, it is ordered as BC1, BC2, BC3, BC4, BC5, BC6H and BC7
bool supportsAdrenoDirectMemoryImport{};