The-Homebrew-Cloud/skyline
2
0
Fork 0
mirror of https://github.com/skyline-emu/skyline.git synced 2024-11-26 00:34:18 +01:00
Code Issues Packages Projects Releases Wiki Activity

Commonise maxwell3d sampler code

Browse Source 
This will be shared with the compute engine implementation, the only thing of note with this is that the binding register is now passed as a param since it is part of the compute QMD which can't be dirty tracked.
This commit is contained in:
Billy Laws 2022-11-18 21:03:02 +00:00
parent 7f93ec3df6
commit 61e95c4b2c
11 changed files with 43 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
app/src/main/cpp/skyline/gpu/interconnect/maxwell_3d/samplers.cpp → app/src/main/cpp/skyline/gpu/interconnect/common/samplers.cpp
View File

@ -5,19 +5,24 @@
#include <soc/gm20b/gmmu.h>
#include "samplers.h"
namespace skyline::gpu::interconnect::maxwell3d {
namespace skyline::gpu::interconnect {
void SamplerPoolState::EngineRegisters::DirtyBind(DirtyManager &manager, dirty::Handle handle) const {
manager.Bind(handle, samplerBinding, texSamplerPool, texHeaderPool);
manager.Bind(handle, texSamplerPool, texHeaderPool);
}
SamplerPoolState::SamplerPoolState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine) : engine{manager, dirtyHandle, engine} {}
void SamplerPoolState::Flush(InterconnectContext &ctx) {
useTexHeaderBinding = engine->samplerBinding.value == engine::SamplerBinding::Value::ViaHeaderBinding;
void SamplerPoolState::Flush(InterconnectContext &ctx, bool useTexHeaderBinding) {
u32 maximumIndex{useTexHeaderBinding ? engine->texHeaderPool.maximumIndex : engine->texSamplerPool.maximumIndex};
auto mapping{ctx.channelCtx.asCtx->gmmu.LookupBlock(engine->texSamplerPool.offset)};
texSamplers = mapping.first.subspan(mapping.second).cast<TextureSamplerControl>().first(maximumIndex + 1);
didUseTexHeaderBinding = useTexHeaderBinding;
}
bool SamplerPoolState::Refresh(InterconnectContext &ctx, bool useTexHeaderBinding) {
return didUseTexHeaderBinding != useTexHeaderBinding;
}
void SamplerPoolState::PurgeCaches() {
@ -26,6 +31,10 @@ namespace skyline::gpu::interconnect::maxwell3d {
Samplers::Samplers(DirtyManager &manager, const SamplerPoolState::EngineRegisters &engine) : samplerPool{manager, engine} {}
void Samplers::Update(InterconnectContext &ctx, bool useTexHeaderBinding) {
samplerPool.Update(ctx, useTexHeaderBinding);
}
void Samplers::MarkAllDirty() {
samplerPool.MarkDirty(true);
std::fill(texSamplerCache.begin(), texSamplerCache.end(), nullptr);
@ -140,8 +149,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
}
vk::raii::Sampler *Samplers::GetSampler(InterconnectContext &ctx, u32 samplerIndex, u32 textureIndex) {
const auto &samplerPoolObj{samplerPool.UpdateGet(ctx)};
u32 index{samplerPoolObj.useTexHeaderBinding ? textureIndex : samplerIndex};
const auto &samplerPoolObj{samplerPool.Get()};
u32 index{samplerPoolObj.didUseTexHeaderBinding ? textureIndex : samplerIndex};
auto texSamplers{samplerPoolObj.texSamplers};
if (texSamplers.size() != texSamplerCache.size()) {
texSamplerCache.resize(texSamplers.size());

17
app/src/main/cpp/skyline/gpu/interconnect/maxwell_3d/samplers.h → app/src/main/cpp/skyline/gpu/interconnect/common/samplers.h
View File

@ -7,13 +7,12 @@
#include "common.h"
#include "tsc.h"
namespace skyline::gpu::interconnect::maxwell3d {
class SamplerPoolState : dirty::CachedManualDirty {
namespace skyline::gpu::interconnect {
class SamplerPoolState : dirty::CachedManualDirty, dirty::RefreshableManualDirty {
public:
struct EngineRegisters {
const engine::SamplerBinding &samplerBinding;
const engine::TexSamplerPool &texSamplerPool;
const engine::TexHeaderPool &texHeaderPool;
const engine_common::TexSamplerPool &texSamplerPool;
const engine_common::TexHeaderPool &texHeaderPool;
void DirtyBind(DirtyManager &manager, dirty::Handle handle) const;
};
@ -23,11 +22,13 @@ namespace skyline::gpu::interconnect::maxwell3d {
public:
span<TextureSamplerControl> texSamplers;
bool useTexHeaderBinding;
bool didUseTexHeaderBinding;
SamplerPoolState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine);
void Flush(InterconnectContext &ctx);
void Flush(InterconnectContext &ctx, bool useTexHeaderBinding);
bool Refresh(InterconnectContext &ctx, bool useTexHeaderBinding);
void PurgeCaches();
};
@ -42,6 +43,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
public:
Samplers(DirtyManager &manager, const SamplerPoolState::EngineRegisters &engine);
void Update(InterconnectContext &ctx, bool useTexHeaderBinding);
void MarkAllDirty();
vk::raii::Sampler *GetSampler(InterconnectContext &ctx, u32 samplerIndex, u32 textureIndex);

0
app/src/main/cpp/skyline/gpu/interconnect/maxwell_3d/tsc.h → app/src/main/cpp/skyline/gpu/interconnect/common/tsc.h
View File

2
app/src/main/cpp/skyline/gpu/interconnect/maxwell_3d/maxwell_3d.cpp
View File

@ -22,6 +22,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
clearEngineRegisters{registerBundle.clearRegisters},
constantBuffers{manager, registerBundle.constantBufferSelectorRegisters},
samplers{manager, registerBundle.samplerPoolRegisters},
samplerBinding{registerBundle.samplerBinding},
textures{manager, registerBundle.texturePoolRegisters},
directState{activeState.directState} {
ctx.executor.AddFlushCallback([this] {
@ -213,6 +214,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
StateUpdateBuilder builder{*ctx.executor.allocator};
Pipeline *oldPipeline{activeState.GetPipeline()};
samplers.Update(ctx, samplerBinding.value == engine::SamplerBinding::Value::ViaHeaderBinding);
activeState.Update(ctx, textures, constantBuffers.boundConstantBuffers, builder, indexed, topology, first, count);
if (directState.inputAssembly.NeedsQuadConversion()) {
count = conversion::quads::GetIndexCount(count);

4
app/src/main/cpp/skyline/gpu/interconnect/maxwell_3d/maxwell_3d.h
View File

@ -4,10 +4,10 @@
#pragma once
#include <gpu/descriptor_allocator.h>
#include <gpu/interconnect/common/samplers.h>
#include "common.h"
#include "active_state.h"
#include "constant_buffers.h"
#include "samplers.h"
#include "textures.h"
namespace skyline::gpu::interconnect::maxwell3d {
@ -35,6 +35,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
ClearEngineRegisters clearRegisters;
ConstantBufferSelectorState::EngineRegisters constantBufferSelectorRegisters;
SamplerPoolState::EngineRegisters samplerPoolRegisters;
const engine::SamplerBinding &samplerBinding;
TexturePoolState::EngineRegisters texturePoolRegisters;
};
@ -44,6 +45,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
ClearEngineRegisters clearEngineRegisters;
ConstantBuffers constantBuffers;
Samplers samplers;
const engine::SamplerBinding &samplerBinding;
Textures textures;
std::shared_ptr<memory::Buffer> quadConversionBuffer{};
bool quadConversionBufferAttached{};

2
app/src/main/cpp/skyline/gpu/interconnect/maxwell_3d/pipeline_manager.h
View File

@ -6,10 +6,10 @@
#include <tsl/robin_map.h>
#include <shader_compiler/frontend/ir/program.h>
#include <gpu/cache/graphics_pipeline_cache.h>
#include <gpu/interconnect/common/samplers.h>
#include "common.h"
#include "packed_pipeline_state.h"
#include "constant_buffers.h"
#include "samplers.h"
#include "textures.h"
namespace skyline::gpu {

6
app/src/main/cpp/skyline/soc/gm20b/engines/engine.h
View File

@ -47,6 +47,12 @@ namespace skyline::soc::gm20b::engine {
};
static_assert(sizeof(Address) == sizeof(u64));
struct TexSamplerPool {
Address offset;
u32 maximumIndex;
};
static_assert(sizeof(TexSamplerPool) == sizeof(u32) * 3);
constexpr u32 EngineMethodsEnd{0xE00}; //!< All methods above this are passed to the MME on supported engines
/**

3
app/src/main/cpp/skyline/soc/gm20b/engines/kepler_compute.h
View File

@ -95,8 +95,7 @@ namespace skyline::soc::gm20b::engine {
Register<0x54A, u32> shaderExceptions;
Register<0x557, Address> texSamplerPool;
Register<0x559, u32> texSamplerPoolMaximumIndex;
Register<0x557, TexSamplerPool> texSamplerPool;
Register<0x55D, Address> texHeaderPool;
Register<0x55F, u32> texHeaderPoolMaximumIndex;

6
app/src/main/cpp/skyline/soc/gm20b/engines/maxwell/types.h
View File

@ -556,12 +556,6 @@ namespace skyline::soc::gm20b::engine::maxwell3d::type {
};
static_assert(sizeof(SamplerBinding) == sizeof(u32));
struct TexSamplerPool {
Address offset;
u32 maximumIndex;
};
static_assert(sizeof(TexSamplerPool) == sizeof(u32) * 3);
struct TexHeaderPool {
Address offset;
u32 maximumIndex;

3
app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.cpp
View File

@ -50,7 +50,8 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
.activeStateRegisters = MakeActiveStateRegisters(registers),
.clearRegisters = {registers.scissors[0], registers.viewportClips[0], *registers.clearRect, *registers.colorClearValue, *registers.zClearValue, *registers.stencilClearValue, *registers.surfaceClip, *registers.clearSurfaceControl},
.constantBufferSelectorRegisters = {*registers.constantBufferSelector},
.samplerPoolRegisters = {*registers.samplerBinding, *registers.texSamplerPool, *registers.texHeaderPool},
.samplerPoolRegisters = {*registers.texSamplerPool, *registers.texHeaderPool},
.samplerBinding = *registers.samplerBinding,
.texturePoolRegisters = {*registers.texHeaderPool}
};
}

7
app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.h
View File

@ -6,9 +6,8 @@
#pragma once
#include <gpu/interconnect/maxwell_3d/maxwell_3d.h>
#include "engine.h"
#include <soc/host1x/syncpoint.h>
#include "gpu/interconnect/maxwell_3d/common.h"
#include "engine.h"
#include "inline2memory.h"
#include "maxwell/types.h"
@ -24,7 +23,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
private:
host1x::SyncpointSet &syncpoints;
Inline2MemoryBackend i2m;
gpu::interconnect::maxwell3d::DirtyManager dirtyManager;
gpu::interconnect::DirtyManager dirtyManager;
gpu::interconnect::maxwell3d::Maxwell3D interconnect;
union BatchEnableState {
@ -267,7 +266,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
Register<0x54F, type::MultisampleControl> multisampleControl;
Register<0x557, type::TexSamplerPool> texSamplerPool;
Register<0x557, TexSamplerPool> texSamplerPool;
Register<0x55B, float> slopeScaleDepthBias;
Register<0x55C, u32> aliasedLineWidthEnable;