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https://github.com/skyline-emu/skyline.git
synced 2024-11-10 19:05:08 +01:00
Reformat maxwell3d interconnect codebase
This commit is contained in:
parent
3766be59e7
commit
62a165b51e
@ -435,9 +435,11 @@ namespace skyline::gpu::interconnect::maxwell3d {
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});
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});
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if (binding.GetInputRate() == vk::VertexInputRate::eInstance) {
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if (binding.GetInputRate() == vk::VertexInputRate::eInstance) {
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if (!ctx.gpu.traits.supportsVertexAttributeDivisor) [[unlikely]]
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if (!ctx.gpu.traits.supportsVertexAttributeDivisor)
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[[unlikely]]
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Logger::Warn("Vertex attribute divisor used on guest without host support");
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Logger::Warn("Vertex attribute divisor used on guest without host support");
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else if (!ctx.gpu.traits.supportsVertexAttributeZeroDivisor && binding.divisor == 0) [[unlikely]]
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else if (!ctx.gpu.traits.supportsVertexAttributeZeroDivisor && binding.divisor == 0)
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[[unlikely]]
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Logger::Warn("Vertex attribute zero divisor used on guest without host support");
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Logger::Warn("Vertex attribute zero divisor used on guest without host support");
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else
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else
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bindingDivisorDescs.push_back({
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bindingDivisorDescs.push_back({
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@ -207,5 +207,4 @@ namespace skyline::gpu::interconnect::maxwell3d {
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return sampler.get();
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return sampler.get();
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}
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}
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}
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}
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@ -39,7 +39,6 @@ namespace skyline::gpu::interconnect::maxwell3d {
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tsl::robin_map<TextureSamplerControl, std::unique_ptr<vk::raii::Sampler>, util::ObjectHash<TextureSamplerControl>> texSamplerStore;
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tsl::robin_map<TextureSamplerControl, std::unique_ptr<vk::raii::Sampler>, util::ObjectHash<TextureSamplerControl>> texSamplerStore;
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std::vector<vk::raii::Sampler *> texSamplerCache;
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std::vector<vk::raii::Sampler *> texSamplerCache;
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public:
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public:
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Samplers(DirtyManager &manager, const SamplerPoolState::EngineRegisters &engine);
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Samplers(DirtyManager &manager, const SamplerPoolState::EngineRegisters &engine);
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@ -184,7 +184,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
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};
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};
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using SetBaseStencilStateCmd = CmdHolder<SetBaseStencilStateCmdImpl>;
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using SetBaseStencilStateCmd = CmdHolder<SetBaseStencilStateCmdImpl>;
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struct SetDescriptorSetWithUpdateCmdImpl {
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template<bool PushDescriptor>
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struct SetDescriptorSetCmdImpl {
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void Record(GPU &gpu, vk::raii::CommandBuffer &commandBuffer) {
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void Record(GPU &gpu, vk::raii::CommandBuffer &commandBuffer) {
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// Resolve descriptor infos from dynamic bindings
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// Resolve descriptor infos from dynamic bindings
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for (size_t i{}; i < updateInfo->bufferDescDynamicBindings.size(); i++) {
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for (size_t i{}; i < updateInfo->bufferDescDynamicBindings.size(); i++) {
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@ -332,7 +333,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
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}
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}
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void SetIndexBuffer(const BufferBinding &binding, vk::IndexType indexType) {
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void SetIndexBuffer(const BufferBinding &binding, vk::IndexType indexType) {
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AppendCmd<SetIndexBufferCmd>({
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AppendCmd<SetIndexBufferCmd>(
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{
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.indexType = indexType,
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.indexType = indexType,
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.buffer = binding.buffer,
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.buffer = binding.buffer,
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.offset = binding.offset,
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.offset = binding.offset,
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@ -342,14 +344,16 @@ namespace skyline::gpu::interconnect::maxwell3d {
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void SetIndexBuffer(BufferView view, vk::IndexType indexType) {
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void SetIndexBuffer(BufferView view, vk::IndexType indexType) {
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view.GetBuffer()->BlockSequencedCpuBackingWrites();
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view.GetBuffer()->BlockSequencedCpuBackingWrites();
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AppendCmd<SetIndexBufferDynamicCmd>({
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AppendCmd<SetIndexBufferDynamicCmd>(
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{
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.base.indexType = indexType,
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.base.indexType = indexType,
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.view = view,
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.view = view,
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});
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});
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}
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}
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void SetTransformFeedbackBuffer(u32 index, const BufferBinding &binding) {
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void SetTransformFeedbackBuffer(u32 index, const BufferBinding &binding) {
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AppendCmd<SetTransformFeedbackBufferCmd>({
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AppendCmd<SetTransformFeedbackBufferCmd>(
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{
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.binding = index,
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.binding = index,
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.buffer = binding.buffer,
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.buffer = binding.buffer,
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.offset = binding.offset,
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.offset = binding.offset,
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@ -359,34 +363,39 @@ namespace skyline::gpu::interconnect::maxwell3d {
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void SetTransformFeedbackBuffer(u32 index, BufferView view) {
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void SetTransformFeedbackBuffer(u32 index, BufferView view) {
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view.GetBuffer()->BlockSequencedCpuBackingWrites();
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view.GetBuffer()->BlockSequencedCpuBackingWrites();
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AppendCmd<SetTransformFeedbackBufferDynamicCmd>({
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AppendCmd<SetTransformFeedbackBufferDynamicCmd>(
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{
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.base.binding = index,
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.base.binding = index,
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.view = view,
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.view = view,
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});
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});
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}
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}
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void SetViewport(u32 index, const vk::Viewport &viewport) {
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void SetViewport(u32 index, const vk::Viewport &viewport) {
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AppendCmd<SetViewportCmd>({
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AppendCmd<SetViewportCmd>(
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{
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.index = index,
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.index = index,
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.viewport = viewport,
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.viewport = viewport,
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});
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});
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}
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}
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void SetScissor(u32 index, const vk::Rect2D &scissor) {
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void SetScissor(u32 index, const vk::Rect2D &scissor) {
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AppendCmd<SetScissorCmd>({
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AppendCmd<SetScissorCmd>(
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{
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.index = index,
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.index = index,
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.scissor = scissor,
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.scissor = scissor,
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});
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});
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}
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}
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void SetLineWidth(float lineWidth) {
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void SetLineWidth(float lineWidth) {
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AppendCmd<SetLineWidthCmd>({
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AppendCmd<SetLineWidthCmd>(
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{
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.lineWidth = lineWidth,
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.lineWidth = lineWidth,
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});
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});
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}
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}
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void SetDepthBias(float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) {
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void SetDepthBias(float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) {
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AppendCmd<SetDepthBiasCmd>({
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AppendCmd<SetDepthBiasCmd>(
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{
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.depthBiasConstantFactor = depthBiasConstantFactor,
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.depthBiasConstantFactor = depthBiasConstantFactor,
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.depthBiasClamp = depthBiasClamp,
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.depthBiasClamp = depthBiasClamp,
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.depthBiasSlopeFactor = depthBiasSlopeFactor,
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.depthBiasSlopeFactor = depthBiasSlopeFactor,
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@ -394,20 +403,23 @@ namespace skyline::gpu::interconnect::maxwell3d {
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}
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}
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void SetBlendConstants(const std::array<float, engine::BlendColorChannelCount> &blendConstants) {
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void SetBlendConstants(const std::array<float, engine::BlendColorChannelCount> &blendConstants) {
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AppendCmd<SetBlendConstantsCmd>({
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AppendCmd<SetBlendConstantsCmd>(
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{
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.blendConstants = blendConstants,
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.blendConstants = blendConstants,
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});
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});
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}
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}
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void SetDepthBounds(float minDepthBounds, float maxDepthBounds) {
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void SetDepthBounds(float minDepthBounds, float maxDepthBounds) {
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AppendCmd<SetDepthBoundsCmd>({
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AppendCmd<SetDepthBoundsCmd>(
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{
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.minDepthBounds = minDepthBounds,
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.minDepthBounds = minDepthBounds,
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.maxDepthBounds = maxDepthBounds,
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.maxDepthBounds = maxDepthBounds,
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});
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});
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}
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}
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void SetBaseStencilState(vk::StencilFaceFlags flags, u32 funcRef, u32 funcMask, u32 mask) {
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void SetBaseStencilState(vk::StencilFaceFlags flags, u32 funcRef, u32 funcMask, u32 mask) {
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AppendCmd<SetBaseStencilStateCmd>({
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AppendCmd<SetBaseStencilStateCmd>(
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{
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.flags = flags,
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.flags = flags,
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.funcRef = funcRef,
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.funcRef = funcRef,
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.funcMask = funcMask,
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.funcMask = funcMask,
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@ -416,7 +428,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
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}
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}
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void SetDescriptorSetWithUpdate(DescriptorUpdateInfo *updateInfo, DescriptorAllocator::ActiveDescriptorSet *dstSet, DescriptorAllocator::ActiveDescriptorSet *srcSet) {
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void SetDescriptorSetWithUpdate(DescriptorUpdateInfo *updateInfo, DescriptorAllocator::ActiveDescriptorSet *dstSet, DescriptorAllocator::ActiveDescriptorSet *srcSet) {
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AppendCmd<SetDescriptorSetWithUpdateCmd>({
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AppendCmd<SetDescriptorSetWithUpdateCmd>(
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{
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.updateInfo = updateInfo,
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.updateInfo = updateInfo,
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.srcSet = srcSet,
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.srcSet = srcSet,
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.dstSet = dstSet,
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.dstSet = dstSet,
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@ -424,9 +437,17 @@ namespace skyline::gpu::interconnect::maxwell3d {
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}
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}
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void SetPipeline(vk::Pipeline pipeline) {
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void SetPipeline(vk::Pipeline pipeline) {
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AppendCmd<SetPipelineCmd>({
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AppendCmd<SetPipelineCmd>(
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{
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.pipeline = pipeline,
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.pipeline = pipeline,
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});
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});
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}
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}
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void SetDescriptorSetWithPush(DescriptorUpdateInfo *updateInfo) {
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AppendCmd<SetDescriptorSetWithPushCmd>(
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{
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.updateInfo = updateInfo,
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});
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}
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};
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};
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}
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}
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@ -200,7 +200,6 @@ namespace skyline::gpu::interconnect {
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e16to1 = 7,
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e16to1 = 7,
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};
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};
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// 0x00
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// 0x00
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struct FormatWord {
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struct FormatWord {
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static constexpr u32 FormatColorComponentPadMask{(1U << 31) | 0b111'111'111'111'1111111U}; //!< Mask for the format, component and pad fields
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static constexpr u32 FormatColorComponentPadMask{(1U << 31) | 0b111'111'111'111'1111111U}; //!< Mask for the format, component and pad fields
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