mirror of
https://github.com/skyline-emu/skyline.git
synced 2024-12-23 20:11:49 +01:00
Reformat maxwell3d interconnect codebase
This commit is contained in:
parent
3766be59e7
commit
62a165b51e
@ -49,7 +49,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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bool VertexBufferState::Refresh(InterconnectContext &ctx, StateUpdateBuilder &builder) {
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bool VertexBufferState::Refresh(InterconnectContext &ctx, StateUpdateBuilder &builder) {
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if (megaBufferBinding) {
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if (megaBufferBinding) {
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if (auto newMegaBufferBinding{view->TryMegaBuffer(ctx.executor.cycle, ctx.executor.AcquireMegaBufferAllocator(), ctx.executor.executionNumber)};
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if (auto newMegaBufferBinding{view->TryMegaBuffer(ctx.executor.cycle, ctx.executor.AcquireMegaBufferAllocator(), ctx.executor.executionNumber)};
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newMegaBufferBinding != megaBufferBinding) {
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newMegaBufferBinding != megaBufferBinding) {
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megaBufferBinding = newMegaBufferBinding;
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megaBufferBinding = newMegaBufferBinding;
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if (megaBufferBinding)
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if (megaBufferBinding)
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@ -15,7 +15,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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};
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};
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private:
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private:
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dirty::BoundSubresource<EngineRegisters> engine;
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dirty::BoundSubresource <EngineRegisters> engine;
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public:
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public:
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ConstantBufferSelectorState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine);
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ConstantBufferSelectorState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine);
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@ -32,7 +32,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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struct ConstantBuffer {
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struct ConstantBuffer {
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BufferView view;
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BufferView view;
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void Read(CommandExecutor &executor, span<u8> dstBuffer, size_t srcOffset);
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void Read(CommandExecutor &executor, span <u8> dstBuffer, size_t srcOffset);
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template<typename T>
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template<typename T>
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T Read(CommandExecutor &executor, size_t srcOffset) {
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T Read(CommandExecutor &executor, size_t srcOffset) {
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@ -49,7 +49,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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*/
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*/
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class ConstantBuffers {
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class ConstantBuffers {
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private:
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private:
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dirty::ManualDirtyState<ConstantBufferSelectorState> selectorState;
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dirty::ManualDirtyState <ConstantBufferSelectorState> selectorState;
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public:
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public:
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ConstantBufferSet boundConstantBuffers;
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ConstantBufferSet boundConstantBuffers;
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@ -68,7 +68,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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void MarkAllDirty();
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void MarkAllDirty();
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void Load(InterconnectContext &ctx, span<u32> data, u32 offset);
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void Load(InterconnectContext &ctx, span <u32> data, u32 offset);
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void Bind(InterconnectContext &ctx, engine::ShaderStage stage, size_t index);
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void Bind(InterconnectContext &ctx, engine::ShaderStage stage, size_t index);
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@ -152,9 +152,9 @@ namespace skyline::gpu::interconnect::maxwell3d {
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static VkColorComponentFlags ConvertColorWriteMask(engine::CtWrite write) {
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static VkColorComponentFlags ConvertColorWriteMask(engine::CtWrite write) {
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return (write.rEnable ? VK_COLOR_COMPONENT_R_BIT : 0) |
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return (write.rEnable ? VK_COLOR_COMPONENT_R_BIT : 0) |
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(write.gEnable ? VK_COLOR_COMPONENT_G_BIT : 0) |
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(write.gEnable ? VK_COLOR_COMPONENT_G_BIT : 0) |
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(write.bEnable ? VK_COLOR_COMPONENT_B_BIT : 0) |
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(write.bEnable ? VK_COLOR_COMPONENT_B_BIT : 0) |
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(write.aEnable ? VK_COLOR_COMPONENT_A_BIT : 0);
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(write.aEnable ? VK_COLOR_COMPONENT_A_BIT : 0);
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};
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};
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static u8 ConvertBlendOp(engine::BlendOp op) {
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static u8 ConvertBlendOp(engine::BlendOp op) {
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@ -174,8 +174,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
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ctx.gpu.shader.ResetPools();
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ctx.gpu.shader.ResetPools();
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using PipelineStage = engine::Pipeline::Shader::Type;
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using PipelineStage = engine::Pipeline::Shader::Type;
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auto pipelineStage{[](size_t i){ return static_cast<PipelineStage>(i); }};
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auto pipelineStage{[](size_t i) { return static_cast<PipelineStage>(i); }};
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auto stageIdx{[](PipelineStage stage){ return static_cast<u8>(stage); }};
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auto stageIdx{[](PipelineStage stage) { return static_cast<u8>(stage); }};
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std::array<Shader::IR::Program, engine::PipelineCount> programs;
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std::array<Shader::IR::Program, engine::PipelineCount> programs;
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bool ignoreVertexCullBeforeFetch{};
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bool ignoreVertexCullBeforeFetch{};
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@ -233,7 +233,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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auto &stageDescInfo{descriptorInfo.stages[i]};
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auto &stageDescInfo{descriptorInfo.stages[i]};
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auto pushBindings{[&](vk::DescriptorType type, const auto &descs, u32 &count, auto &&descCb, bool individualDescWrites = false) {
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auto pushBindings{[&](vk::DescriptorType type, const auto &descs, u32 &count, auto &&descCb, bool individualDescWrites = false) {
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descriptorInfo.totalWriteDescCount += individualDescWrites ? descs.size() : ((descs.size() > 0) ? 1 : 0);
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descriptorInfo.totalWriteDescCount += individualDescWrites ? descs.size() : ((descs.size() > 0) ? 1 : 0);
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for (u32 descIdx{}; descIdx < descs.size(); descIdx++) {
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for (u32 descIdx{}; descIdx < descs.size(); descIdx++) {
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@ -328,7 +328,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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numericalType = engine::VertexAttribute::NumericalType::Uint;
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numericalType = engine::VertexAttribute::NumericalType::Uint;
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switch (componentBitWidths | numericalType) {
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switch (componentBitWidths | numericalType) {
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/* 8-bit components */
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/* 8-bit components */
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FORMAT_NORM_INT_SCALED_CASE(R8, eR8);
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FORMAT_NORM_INT_SCALED_CASE(R8, eR8);
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FORMAT_NORM_INT_SCALED_CASE(R8_G8, eR8G8);
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FORMAT_NORM_INT_SCALED_CASE(R8_G8, eR8G8);
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FORMAT_NORM_INT_SCALED_CASE(G8R8, eR8G8);
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FORMAT_NORM_INT_SCALED_CASE(G8R8, eR8G8);
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@ -429,21 +429,23 @@ namespace skyline::gpu::interconnect::maxwell3d {
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for (u32 i{}; i < engine::VertexStreamCount; i++) {
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for (u32 i{}; i < engine::VertexStreamCount; i++) {
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const auto &binding{packedState.vertexBindings[i]};
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const auto &binding{packedState.vertexBindings[i]};
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bindingDescs.push_back({
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bindingDescs.push_back({
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.binding = i,
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.binding = i,
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.stride = binding.stride,
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.stride = binding.stride,
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.inputRate = binding.GetInputRate(),
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.inputRate = binding.GetInputRate(),
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});
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});
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if (binding.GetInputRate() == vk::VertexInputRate::eInstance) {
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if (binding.GetInputRate() == vk::VertexInputRate::eInstance) {
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if (!ctx.gpu.traits.supportsVertexAttributeDivisor) [[unlikely]]
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if (!ctx.gpu.traits.supportsVertexAttributeDivisor)
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[[unlikely]]
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Logger::Warn("Vertex attribute divisor used on guest without host support");
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Logger::Warn("Vertex attribute divisor used on guest without host support");
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else if (!ctx.gpu.traits.supportsVertexAttributeZeroDivisor && binding.divisor == 0) [[unlikely]]
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else if (!ctx.gpu.traits.supportsVertexAttributeZeroDivisor && binding.divisor == 0)
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[[unlikely]]
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Logger::Warn("Vertex attribute zero divisor used on guest without host support");
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Logger::Warn("Vertex attribute zero divisor used on guest without host support");
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else
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else
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bindingDivisorDescs.push_back({
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bindingDivisorDescs.push_back({
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.binding = i,
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.binding = i,
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.divisor = binding.divisor,
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.divisor = binding.divisor,
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});
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});
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}
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}
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}
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}
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@ -451,11 +453,11 @@ namespace skyline::gpu::interconnect::maxwell3d {
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const auto &attribute{packedState.vertexAttributes[i]};
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const auto &attribute{packedState.vertexAttributes[i]};
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if (attribute.source == engine::VertexAttribute::Source::Active && shaderStages[0].info.loads.Generic(i))
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if (attribute.source == engine::VertexAttribute::Source::Active && shaderStages[0].info.loads.Generic(i))
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attributeDescs.push_back({
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attributeDescs.push_back({
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.location = i,
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.location = i,
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.binding = attribute.stream,
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.binding = attribute.stream,
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.format = ConvertVertexInputAttributeFormat(attribute.componentBitWidths, attribute.numericalType),
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.format = ConvertVertexInputAttributeFormat(attribute.componentBitWidths, attribute.numericalType),
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.offset = attribute.offset,
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.offset = attribute.offset,
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});
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});
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}
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}
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vk::StructureChain<vk::PipelineVertexInputStateCreateInfo, vk::PipelineVertexInputDivisorStateCreateInfoEXT> vertexInputState{
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vk::StructureChain<vk::PipelineVertexInputStateCreateInfo, vk::PipelineVertexInputDivisorStateCreateInfoEXT> vertexInputState{
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@ -668,7 +670,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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size_t primaryCbufOffset{desc.cbuf_offset + elemOffset};
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size_t primaryCbufOffset{desc.cbuf_offset + elemOffset};
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u32 primaryVal{primaryCbuf.Read<u32>(ctx.executor, primaryCbufOffset)};
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u32 primaryVal{primaryCbuf.Read<u32>(ctx.executor, primaryCbufOffset)};
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if constexpr (requires { desc.has_secondary; } ) {
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if constexpr (requires { desc.has_secondary; }) {
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if (desc.has_secondary) {
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if (desc.has_secondary) {
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ConstantBuffer &secondaryCbuf{constantBuffers[desc.secondary_cbuf_index]};
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ConstantBuffer &secondaryCbuf{constantBuffers[desc.secondary_cbuf_index]};
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size_t secondaryCbufOffset{desc.secondary_cbuf_offset + elemOffset};
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size_t secondaryCbufOffset{desc.secondary_cbuf_offset + elemOffset};
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@ -677,7 +679,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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}
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}
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}
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}
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return { .raw = primaryVal };
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return {.raw = primaryVal};
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}
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}
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static vk::DescriptorImageInfo GetTextureBinding(InterconnectContext &ctx, const Shader::TextureDescriptor &desc, Samplers &samplers, Textures &textures, BindlessHandle handle) {
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static vk::DescriptorImageInfo GetTextureBinding(InterconnectContext &ctx, const Shader::TextureDescriptor &desc, Samplers &samplers, Textures &textures, BindlessHandle handle) {
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@ -768,23 +770,23 @@ namespace skyline::gpu::interconnect::maxwell3d {
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writeBufferDescs(vk::DescriptorType::eUniformBuffer, stage.info.constant_buffer_descriptors, stageDescInfo.uniformBufferDescCount,
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writeBufferDescs(vk::DescriptorType::eUniformBuffer, stage.info.constant_buffer_descriptors, stageDescInfo.uniformBufferDescCount,
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[&](const Shader::ConstantBufferDescriptor &desc, size_t arrayIdx) {
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[&](const Shader::ConstantBufferDescriptor &desc, size_t arrayIdx) {
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size_t cbufIdx{desc.index + arrayIdx};
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size_t cbufIdx{desc.index + arrayIdx};
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return GetConstantBufferBinding(ctx, stage.info, constantBuffers[i][cbufIdx].view, cbufIdx);
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return GetConstantBufferBinding(ctx, stage.info, constantBuffers[i][cbufIdx].view, cbufIdx);
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});
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});
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writeBufferDescs(vk::DescriptorType::eStorageBuffer, stage.info.storage_buffers_descriptors, stageDescInfo.storageBufferDescCount,
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writeBufferDescs(vk::DescriptorType::eStorageBuffer, stage.info.storage_buffers_descriptors, stageDescInfo.storageBufferDescCount,
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[&](const Shader::StorageBufferDescriptor &desc, size_t arrayIdx) {
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[&](const Shader::StorageBufferDescriptor &desc, size_t arrayIdx) {
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auto binding{GetStorageBufferBinding(ctx, desc, constantBuffers[i][desc.cbuf_index], storageBufferViews[storageBufferIdx - arrayIdx ? 1 : 0])};
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auto binding{GetStorageBufferBinding(ctx, desc, constantBuffers[i][desc.cbuf_index], storageBufferViews[storageBufferIdx - arrayIdx ? 1 : 0])};
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// Storage buffer arrays all share the same view index, so to only increment the index once per array do it at element zero and subtract that for all subsequent array elems (see above)
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// Storage buffer arrays all share the same view index, so to only increment the index once per array do it at element zero and subtract that for all subsequent array elems (see above)
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storageBufferIdx += arrayIdx ? 0 : 1;
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storageBufferIdx += arrayIdx ? 0 : 1;
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return binding;
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return binding;
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});
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});
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writeImageDescs(vk::DescriptorType::eCombinedImageSampler, stage.info.texture_descriptors, stageDescInfo.combinedImageSamplerDescCount,
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writeImageDescs(vk::DescriptorType::eCombinedImageSampler, stage.info.texture_descriptors, stageDescInfo.combinedImageSamplerDescCount,
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[&](const Shader::TextureDescriptor &desc, size_t arrayIdx) {
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[&](const Shader::TextureDescriptor &desc, size_t arrayIdx) {
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BindlessHandle handle{ReadBindlessHandle(ctx, constantBuffers[i], desc, arrayIdx)};
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BindlessHandle handle{ReadBindlessHandle(ctx, constantBuffers[i], desc, arrayIdx)};
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return GetTextureBinding(ctx, desc, samplers, textures, handle);
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return GetTextureBinding(ctx, desc, samplers, textures, handle);
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}, ctx.gpu.traits.quirks.needsIndividualTextureBindingWrites);
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}, ctx.gpu.traits.quirks.needsIndividualTextureBindingWrites);
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}
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}
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// Since we don't implement all descriptor types the number of writes might not match what's expected
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// Since we don't implement all descriptor types the number of writes might not match what's expected
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@ -855,21 +857,21 @@ namespace skyline::gpu::interconnect::maxwell3d {
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}};
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}};
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writeDescs.operator()<false, true>(vk::DescriptorType::eUniformBuffer, cbufUsageInfo.uniformBuffers, shaderInfo.constant_buffer_descriptors,
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writeDescs.operator()<false, true>(vk::DescriptorType::eUniformBuffer, cbufUsageInfo.uniformBuffers, shaderInfo.constant_buffer_descriptors,
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[&](auto usage, const Shader::ConstantBufferDescriptor &desc, size_t arrayIdx) -> DynamicBufferBinding {
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[&](auto usage, const Shader::ConstantBufferDescriptor &desc, size_t arrayIdx) -> DynamicBufferBinding {
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size_t cbufIdx{desc.index + arrayIdx};
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size_t cbufIdx{desc.index + arrayIdx};
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return GetConstantBufferBinding(ctx, shaderInfo, stageConstantBuffers[cbufIdx].view, cbufIdx);
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return GetConstantBufferBinding(ctx, shaderInfo, stageConstantBuffers[cbufIdx].view, cbufIdx);
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});
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});
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writeDescs.operator()<false, true>(vk::DescriptorType::eStorageBuffer, cbufUsageInfo.storageBuffers, shaderInfo.storage_buffers_descriptors,
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writeDescs.operator()<false, true>(vk::DescriptorType::eStorageBuffer, cbufUsageInfo.storageBuffers, shaderInfo.storage_buffers_descriptors,
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[&](auto usage, const Shader::StorageBufferDescriptor &desc, size_t arrayIdx) {
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[&](auto usage, const Shader::StorageBufferDescriptor &desc, size_t arrayIdx) {
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return GetStorageBufferBinding(ctx, desc, stageConstantBuffers[desc.cbuf_index], storageBufferViews[usage.storageBufferIdx]);
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return GetStorageBufferBinding(ctx, desc, stageConstantBuffers[desc.cbuf_index], storageBufferViews[usage.storageBufferIdx]);
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});
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});
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writeDescs.operator()<true, false>(vk::DescriptorType::eCombinedImageSampler, cbufUsageInfo.combinedImageSamplers, shaderInfo.texture_descriptors,
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writeDescs.operator()<true, false>(vk::DescriptorType::eCombinedImageSampler, cbufUsageInfo.combinedImageSamplers, shaderInfo.texture_descriptors,
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[&](auto usage, const Shader::TextureDescriptor &desc, size_t arrayIdx) {
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[&](auto usage, const Shader::TextureDescriptor &desc, size_t arrayIdx) {
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BindlessHandle handle{ReadBindlessHandle(ctx, stageConstantBuffers, desc, arrayIdx)};
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BindlessHandle handle{ReadBindlessHandle(ctx, stageConstantBuffers, desc, arrayIdx)};
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return GetTextureBinding(ctx, desc, samplers, textures, handle);
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return GetTextureBinding(ctx, desc, samplers, textures, handle);
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});
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});
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// Since we don't implement all descriptor types the number of writes might not match what's expected
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// Since we don't implement all descriptor types the number of writes might not match what's expected
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if (!writeIdx)
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if (!writeIdx)
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@ -34,11 +34,11 @@ namespace skyline::gpu::interconnect::maxwell3d {
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*/
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*/
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bool BindingsEqual(const ShaderStage &other) const {
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bool BindingsEqual(const ShaderStage &other) const {
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return info.constant_buffer_descriptors == other.info.constant_buffer_descriptors &&
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return info.constant_buffer_descriptors == other.info.constant_buffer_descriptors &&
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info.storage_buffers_descriptors == other.info.storage_buffers_descriptors &&
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info.storage_buffers_descriptors == other.info.storage_buffers_descriptors &&
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info.texture_buffer_descriptors == other.info.texture_buffer_descriptors &&
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info.texture_buffer_descriptors == other.info.texture_buffer_descriptors &&
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info.image_buffer_descriptors == other.info.image_buffer_descriptors &&
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info.image_buffer_descriptors == other.info.image_buffer_descriptors &&
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info.texture_descriptors == other.info.texture_descriptors &&
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info.texture_descriptors == other.info.texture_descriptors &&
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info.image_descriptors == other.info.image_descriptors;
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info.image_descriptors == other.info.image_descriptors;
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}
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}
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};
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};
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@ -207,5 +207,4 @@ namespace skyline::gpu::interconnect::maxwell3d {
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return sampler.get();
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return sampler.get();
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}
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}
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}
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}
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@ -39,7 +39,6 @@ namespace skyline::gpu::interconnect::maxwell3d {
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tsl::robin_map<TextureSamplerControl, std::unique_ptr<vk::raii::Sampler>, util::ObjectHash<TextureSamplerControl>> texSamplerStore;
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tsl::robin_map<TextureSamplerControl, std::unique_ptr<vk::raii::Sampler>, util::ObjectHash<TextureSamplerControl>> texSamplerStore;
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std::vector<vk::raii::Sampler *> texSamplerCache;
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std::vector<vk::raii::Sampler *> texSamplerCache;
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public:
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public:
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Samplers(DirtyManager &manager, const SamplerPoolState::EngineRegisters &engine);
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Samplers(DirtyManager &manager, const SamplerPoolState::EngineRegisters &engine);
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@ -184,7 +184,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
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};
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};
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using SetBaseStencilStateCmd = CmdHolder<SetBaseStencilStateCmdImpl>;
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using SetBaseStencilStateCmd = CmdHolder<SetBaseStencilStateCmdImpl>;
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struct SetDescriptorSetWithUpdateCmdImpl {
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template<bool PushDescriptor>
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struct SetDescriptorSetCmdImpl {
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void Record(GPU &gpu, vk::raii::CommandBuffer &commandBuffer) {
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void Record(GPU &gpu, vk::raii::CommandBuffer &commandBuffer) {
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// Resolve descriptor infos from dynamic bindings
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// Resolve descriptor infos from dynamic bindings
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for (size_t i{}; i < updateInfo->bufferDescDynamicBindings.size(); i++) {
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for (size_t i{}; i < updateInfo->bufferDescDynamicBindings.size(); i++) {
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@ -332,101 +333,121 @@ namespace skyline::gpu::interconnect::maxwell3d {
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}
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}
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void SetIndexBuffer(const BufferBinding &binding, vk::IndexType indexType) {
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void SetIndexBuffer(const BufferBinding &binding, vk::IndexType indexType) {
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AppendCmd<SetIndexBufferCmd>({
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AppendCmd<SetIndexBufferCmd>(
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.indexType = indexType,
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{
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.buffer = binding.buffer,
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.indexType = indexType,
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.offset = binding.offset,
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.buffer = binding.buffer,
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});
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.offset = binding.offset,
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});
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}
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}
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void SetIndexBuffer(BufferView view, vk::IndexType indexType) {
|
void SetIndexBuffer(BufferView view, vk::IndexType indexType) {
|
||||||
view.GetBuffer()->BlockSequencedCpuBackingWrites();
|
view.GetBuffer()->BlockSequencedCpuBackingWrites();
|
||||||
|
|
||||||
AppendCmd<SetIndexBufferDynamicCmd>({
|
AppendCmd<SetIndexBufferDynamicCmd>(
|
||||||
.base.indexType = indexType,
|
{
|
||||||
.view = view,
|
.base.indexType = indexType,
|
||||||
});
|
.view = view,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetTransformFeedbackBuffer(u32 index, const BufferBinding &binding) {
|
void SetTransformFeedbackBuffer(u32 index, const BufferBinding &binding) {
|
||||||
AppendCmd<SetTransformFeedbackBufferCmd>({
|
AppendCmd<SetTransformFeedbackBufferCmd>(
|
||||||
.binding = index,
|
{
|
||||||
.buffer = binding.buffer,
|
.binding = index,
|
||||||
.offset = binding.offset,
|
.buffer = binding.buffer,
|
||||||
});
|
.offset = binding.offset,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetTransformFeedbackBuffer(u32 index, BufferView view) {
|
void SetTransformFeedbackBuffer(u32 index, BufferView view) {
|
||||||
view.GetBuffer()->BlockSequencedCpuBackingWrites();
|
view.GetBuffer()->BlockSequencedCpuBackingWrites();
|
||||||
|
|
||||||
AppendCmd<SetTransformFeedbackBufferDynamicCmd>({
|
AppendCmd<SetTransformFeedbackBufferDynamicCmd>(
|
||||||
.base.binding = index,
|
{
|
||||||
.view = view,
|
.base.binding = index,
|
||||||
});
|
.view = view,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetViewport(u32 index, const vk::Viewport &viewport) {
|
void SetViewport(u32 index, const vk::Viewport &viewport) {
|
||||||
AppendCmd<SetViewportCmd>({
|
AppendCmd<SetViewportCmd>(
|
||||||
.index = index,
|
{
|
||||||
.viewport = viewport,
|
.index = index,
|
||||||
});
|
.viewport = viewport,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetScissor(u32 index, const vk::Rect2D &scissor) {
|
void SetScissor(u32 index, const vk::Rect2D &scissor) {
|
||||||
AppendCmd<SetScissorCmd>({
|
AppendCmd<SetScissorCmd>(
|
||||||
.index = index,
|
{
|
||||||
.scissor = scissor,
|
.index = index,
|
||||||
});
|
.scissor = scissor,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetLineWidth(float lineWidth) {
|
void SetLineWidth(float lineWidth) {
|
||||||
AppendCmd<SetLineWidthCmd>({
|
AppendCmd<SetLineWidthCmd>(
|
||||||
.lineWidth = lineWidth,
|
{
|
||||||
});
|
.lineWidth = lineWidth,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetDepthBias(float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) {
|
void SetDepthBias(float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) {
|
||||||
AppendCmd<SetDepthBiasCmd>({
|
AppendCmd<SetDepthBiasCmd>(
|
||||||
.depthBiasConstantFactor = depthBiasConstantFactor,
|
{
|
||||||
.depthBiasClamp = depthBiasClamp,
|
.depthBiasConstantFactor = depthBiasConstantFactor,
|
||||||
.depthBiasSlopeFactor = depthBiasSlopeFactor,
|
.depthBiasClamp = depthBiasClamp,
|
||||||
});
|
.depthBiasSlopeFactor = depthBiasSlopeFactor,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetBlendConstants(const std::array<float, engine::BlendColorChannelCount> &blendConstants) {
|
void SetBlendConstants(const std::array<float, engine::BlendColorChannelCount> &blendConstants) {
|
||||||
AppendCmd<SetBlendConstantsCmd>({
|
AppendCmd<SetBlendConstantsCmd>(
|
||||||
.blendConstants = blendConstants,
|
{
|
||||||
});
|
.blendConstants = blendConstants,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetDepthBounds(float minDepthBounds, float maxDepthBounds) {
|
void SetDepthBounds(float minDepthBounds, float maxDepthBounds) {
|
||||||
AppendCmd<SetDepthBoundsCmd>({
|
AppendCmd<SetDepthBoundsCmd>(
|
||||||
.minDepthBounds = minDepthBounds,
|
{
|
||||||
.maxDepthBounds = maxDepthBounds,
|
.minDepthBounds = minDepthBounds,
|
||||||
});
|
.maxDepthBounds = maxDepthBounds,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetBaseStencilState(vk::StencilFaceFlags flags, u32 funcRef, u32 funcMask, u32 mask) {
|
void SetBaseStencilState(vk::StencilFaceFlags flags, u32 funcRef, u32 funcMask, u32 mask) {
|
||||||
AppendCmd<SetBaseStencilStateCmd>({
|
AppendCmd<SetBaseStencilStateCmd>(
|
||||||
.flags = flags,
|
{
|
||||||
.funcRef = funcRef,
|
.flags = flags,
|
||||||
.funcMask = funcMask,
|
.funcRef = funcRef,
|
||||||
.mask = mask,
|
.funcMask = funcMask,
|
||||||
});
|
.mask = mask,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetDescriptorSetWithUpdate(DescriptorUpdateInfo *updateInfo, DescriptorAllocator::ActiveDescriptorSet *dstSet, DescriptorAllocator::ActiveDescriptorSet *srcSet) {
|
void SetDescriptorSetWithUpdate(DescriptorUpdateInfo *updateInfo, DescriptorAllocator::ActiveDescriptorSet *dstSet, DescriptorAllocator::ActiveDescriptorSet *srcSet) {
|
||||||
AppendCmd<SetDescriptorSetWithUpdateCmd>({
|
AppendCmd<SetDescriptorSetWithUpdateCmd>(
|
||||||
.updateInfo = updateInfo,
|
{
|
||||||
.srcSet = srcSet,
|
.updateInfo = updateInfo,
|
||||||
.dstSet = dstSet,
|
.srcSet = srcSet,
|
||||||
});
|
.dstSet = dstSet,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void SetPipeline(vk::Pipeline pipeline) {
|
void SetPipeline(vk::Pipeline pipeline) {
|
||||||
AppendCmd<SetPipelineCmd>({
|
AppendCmd<SetPipelineCmd>(
|
||||||
.pipeline = pipeline,
|
{
|
||||||
});
|
.pipeline = pipeline,
|
||||||
|
});
|
||||||
|
}
|
||||||
|
|
||||||
|
void SetDescriptorSetWithPush(DescriptorUpdateInfo *updateInfo) {
|
||||||
|
AppendCmd<SetDescriptorSetWithPushCmd>(
|
||||||
|
{
|
||||||
|
.updateInfo = updateInfo,
|
||||||
|
});
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
@ -200,7 +200,6 @@ namespace skyline::gpu::interconnect {
|
|||||||
e16to1 = 7,
|
e16to1 = 7,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
// 0x00
|
// 0x00
|
||||||
struct FormatWord {
|
struct FormatWord {
|
||||||
static constexpr u32 FormatColorComponentPadMask{(1U << 31) | 0b111'111'111'111'1111111U}; //!< Mask for the format, component and pad fields
|
static constexpr u32 FormatColorComponentPadMask{(1U << 31) | 0b111'111'111'111'1111111U}; //!< Mask for the format, component and pad fields
|
||||||
|
@ -112,7 +112,7 @@ namespace skyline::gpu::interconnect {
|
|||||||
};
|
};
|
||||||
|
|
||||||
public:
|
public:
|
||||||
bool operator==(const TextureSamplerControl&) const = default;
|
bool operator==(const TextureSamplerControl &) const = default;
|
||||||
|
|
||||||
float MaxAnisotropy() {
|
float MaxAnisotropy() {
|
||||||
constexpr size_t AnisotropyCount{8}; //!< The amount of unique anisotropy values that can be represented (2^3 — 3-bit value)
|
constexpr size_t AnisotropyCount{8}; //!< The amount of unique anisotropy values that can be represented (2^3 — 3-bit value)
|
||||||
|
Loading…
Reference in New Issue
Block a user