Reformat maxwell3d interconnect codebase

This commit is contained in:
Billy Laws 2022-10-09 13:57:47 +01:00
parent 3766be59e7
commit 62a165b51e
10 changed files with 153 additions and 133 deletions

View File

@ -435,9 +435,11 @@ namespace skyline::gpu::interconnect::maxwell3d {
});
if (binding.GetInputRate() == vk::VertexInputRate::eInstance) {
if (!ctx.gpu.traits.supportsVertexAttributeDivisor) [[unlikely]]
if (!ctx.gpu.traits.supportsVertexAttributeDivisor)
[[unlikely]]
Logger::Warn("Vertex attribute divisor used on guest without host support");
else if (!ctx.gpu.traits.supportsVertexAttributeZeroDivisor && binding.divisor == 0) [[unlikely]]
else if (!ctx.gpu.traits.supportsVertexAttributeZeroDivisor && binding.divisor == 0)
[[unlikely]]
Logger::Warn("Vertex attribute zero divisor used on guest without host support");
else
bindingDivisorDescs.push_back({

View File

@ -207,5 +207,4 @@ namespace skyline::gpu::interconnect::maxwell3d {
return sampler.get();
}
}

View File

@ -39,7 +39,6 @@ namespace skyline::gpu::interconnect::maxwell3d {
tsl::robin_map<TextureSamplerControl, std::unique_ptr<vk::raii::Sampler>, util::ObjectHash<TextureSamplerControl>> texSamplerStore;
std::vector<vk::raii::Sampler *> texSamplerCache;
public:
Samplers(DirtyManager &manager, const SamplerPoolState::EngineRegisters &engine);

View File

@ -184,7 +184,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
};
using SetBaseStencilStateCmd = CmdHolder<SetBaseStencilStateCmdImpl>;
struct SetDescriptorSetWithUpdateCmdImpl {
template<bool PushDescriptor>
struct SetDescriptorSetCmdImpl {
void Record(GPU &gpu, vk::raii::CommandBuffer &commandBuffer) {
// Resolve descriptor infos from dynamic bindings
for (size_t i{}; i < updateInfo->bufferDescDynamicBindings.size(); i++) {
@ -332,7 +333,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
}
void SetIndexBuffer(const BufferBinding &binding, vk::IndexType indexType) {
AppendCmd<SetIndexBufferCmd>({
AppendCmd<SetIndexBufferCmd>(
{
.indexType = indexType,
.buffer = binding.buffer,
.offset = binding.offset,
@ -342,14 +344,16 @@ namespace skyline::gpu::interconnect::maxwell3d {
void SetIndexBuffer(BufferView view, vk::IndexType indexType) {
view.GetBuffer()->BlockSequencedCpuBackingWrites();
AppendCmd<SetIndexBufferDynamicCmd>({
AppendCmd<SetIndexBufferDynamicCmd>(
{
.base.indexType = indexType,
.view = view,
});
}
void SetTransformFeedbackBuffer(u32 index, const BufferBinding &binding) {
AppendCmd<SetTransformFeedbackBufferCmd>({
AppendCmd<SetTransformFeedbackBufferCmd>(
{
.binding = index,
.buffer = binding.buffer,
.offset = binding.offset,
@ -359,34 +363,39 @@ namespace skyline::gpu::interconnect::maxwell3d {
void SetTransformFeedbackBuffer(u32 index, BufferView view) {
view.GetBuffer()->BlockSequencedCpuBackingWrites();
AppendCmd<SetTransformFeedbackBufferDynamicCmd>({
AppendCmd<SetTransformFeedbackBufferDynamicCmd>(
{
.base.binding = index,
.view = view,
});
}
void SetViewport(u32 index, const vk::Viewport &viewport) {
AppendCmd<SetViewportCmd>({
AppendCmd<SetViewportCmd>(
{
.index = index,
.viewport = viewport,
});
}
void SetScissor(u32 index, const vk::Rect2D &scissor) {
AppendCmd<SetScissorCmd>({
AppendCmd<SetScissorCmd>(
{
.index = index,
.scissor = scissor,
});
}
void SetLineWidth(float lineWidth) {
AppendCmd<SetLineWidthCmd>({
AppendCmd<SetLineWidthCmd>(
{
.lineWidth = lineWidth,
});
}
void SetDepthBias(float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) {
AppendCmd<SetDepthBiasCmd>({
AppendCmd<SetDepthBiasCmd>(
{
.depthBiasConstantFactor = depthBiasConstantFactor,
.depthBiasClamp = depthBiasClamp,
.depthBiasSlopeFactor = depthBiasSlopeFactor,
@ -394,20 +403,23 @@ namespace skyline::gpu::interconnect::maxwell3d {
}
void SetBlendConstants(const std::array<float, engine::BlendColorChannelCount> &blendConstants) {
AppendCmd<SetBlendConstantsCmd>({
AppendCmd<SetBlendConstantsCmd>(
{
.blendConstants = blendConstants,
});
}
void SetDepthBounds(float minDepthBounds, float maxDepthBounds) {
AppendCmd<SetDepthBoundsCmd>({
AppendCmd<SetDepthBoundsCmd>(
{
.minDepthBounds = minDepthBounds,
.maxDepthBounds = maxDepthBounds,
});
}
void SetBaseStencilState(vk::StencilFaceFlags flags, u32 funcRef, u32 funcMask, u32 mask) {
AppendCmd<SetBaseStencilStateCmd>({
AppendCmd<SetBaseStencilStateCmd>(
{
.flags = flags,
.funcRef = funcRef,
.funcMask = funcMask,
@ -416,7 +428,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
}
void SetDescriptorSetWithUpdate(DescriptorUpdateInfo *updateInfo, DescriptorAllocator::ActiveDescriptorSet *dstSet, DescriptorAllocator::ActiveDescriptorSet *srcSet) {
AppendCmd<SetDescriptorSetWithUpdateCmd>({
AppendCmd<SetDescriptorSetWithUpdateCmd>(
{
.updateInfo = updateInfo,
.srcSet = srcSet,
.dstSet = dstSet,
@ -424,9 +437,17 @@ namespace skyline::gpu::interconnect::maxwell3d {
}
void SetPipeline(vk::Pipeline pipeline) {
AppendCmd<SetPipelineCmd>({
AppendCmd<SetPipelineCmd>(
{
.pipeline = pipeline,
});
}
void SetDescriptorSetWithPush(DescriptorUpdateInfo *updateInfo) {
AppendCmd<SetDescriptorSetWithPushCmd>(
{
.updateInfo = updateInfo,
});
}
};
}

View File

@ -200,7 +200,6 @@ namespace skyline::gpu::interconnect {
e16to1 = 7,
};
// 0x00
struct FormatWord {
static constexpr u32 FormatColorComponentPadMask{(1U << 31) | 0b111'111'111'111'1111111U}; //!< Mask for the format, component and pad fields