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https://github.com/skyline-emu/skyline.git
synced 2024-11-23 11:39:17 +01:00
Implement rasterization pipeline state
This commit is contained in:
parent
90cd6adb91
commit
690e96bce0
@ -476,6 +476,72 @@ namespace skyline::gpu::interconnect::maxwell3d {
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// maxwell3d::PipelineStage::TessellationEvaluation);
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// maxwell3d::PipelineStage::TessellationEvaluation);
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}
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}
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/* Rasterizer State */
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void RasterizationState::EngineRegisters::DirtyBind(DirtyManager &manager, dirty::Handle handle) const {
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manager.Bind(handle, rasterEnable, frontPolygonMode, backPolygonMode, viewportClipControl, oglCullEnable, oglFrontFace, oglCullFace, windowOrigin, provokingVertex, polyOffset);
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}
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RasterizationState::RasterizationState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine) : engine{manager, dirtyHandle, engine} {}
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static vk::PolygonMode ConvertPolygonMode(engine::PolygonMode mode) {
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switch (mode) {
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case engine::PolygonMode::Fill:
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return vk::PolygonMode::eFill;
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case engine::PolygonMode::Line:
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return vk::PolygonMode::eLine;
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case engine::PolygonMode::Point:
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return vk::PolygonMode::ePoint;
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}
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}
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static vk::CullModeFlags ConvertCullMode(engine::CullFace cullMode) {
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switch (cullMode) {
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case engine::CullFace::Front:
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return vk::CullModeFlagBits::eFront;
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case engine::CullFace::Back:
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return vk::CullModeFlagBits::eBack;
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case engine::CullFace::FrontAndBack:
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return vk::CullModeFlagBits::eFrontAndBack;
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}
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}
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bool ConvertDepthBiasEnable(engine::PolyOffset polyOffset, engine::PolygonMode polygonMode) {
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switch (polygonMode) {
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case engine::PolygonMode::Point:
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return polyOffset.pointEnable;
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case engine::PolygonMode::Line:
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return polyOffset.lineEnable;
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case engine::PolygonMode::Fill:
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return polyOffset.fillEnable;
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}
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}
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static vk::ProvokingVertexModeEXT ConvertProvokingVertex(engine::ProvokingVertex::Value provokingVertex) {
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switch (provokingVertex) {
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case engine::ProvokingVertex::Value::First:
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return vk::ProvokingVertexModeEXT::eFirstVertex;
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case engine::ProvokingVertex::Value::Last:
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return vk::ProvokingVertexModeEXT::eLastVertex;
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}
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}
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void RasterizationState::Flush() {
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auto &rasterizationCreateInfo{rasterizationState.get<vk::PipelineRasterizationStateCreateInfo>()};
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rasterizationCreateInfo.rasterizerDiscardEnable = !engine->rasterEnable;
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rasterizationCreateInfo.polygonMode = ConvertPolygonMode(engine->frontPolygonMode);
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if (engine->backPolygonMode != engine->frontPolygonMode)
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Logger::Warn("Non-matching polygon modes!");
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rasterizationCreateInfo.cullMode = engine->oglCullEnable ? ConvertCullMode(engine->oglCullFace) : vk::CullModeFlagBits::eNone;
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// UpdateRuntimeInformation(runtimeInfo.y_negate, enabled, maxwell3d::PipelineStage::Vertex, maxwell3d::PipelineStage::Fragment);
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bool origFrontFaceClockwise{engine->oglFrontFace == engine::FrontFace::CW};
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rasterizationCreateInfo.frontFace = (engine->windowOrigin.flipY != origFrontFaceClockwise) ? vk::FrontFace::eClockwise : vk::FrontFace::eCounterClockwise;
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rasterizationCreateInfo.depthBiasEnable = ConvertDepthBiasEnable(engine->polyOffset, engine->frontPolygonMode);
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rasterizationState.get<vk::PipelineRasterizationProvokingVertexStateCreateInfoEXT>().provokingVertexMode = ConvertProvokingVertex(engine->provokingVertex.value);
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}
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/* Pipeline State */
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/* Pipeline State */
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void PipelineState::EngineRegisters::DirtyBind(DirtyManager &manager, dirty::Handle handle) const {
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void PipelineState::EngineRegisters::DirtyBind(DirtyManager &manager, dirty::Handle handle) const {
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auto bindFunc{[&](auto ®s) { regs.DirtyBind(manager, handle); }};
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auto bindFunc{[&](auto ®s) { regs.DirtyBind(manager, handle); }};
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@ -488,7 +554,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
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PipelineState::PipelineState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine)
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PipelineState::PipelineState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine)
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: engine{manager, dirtyHandle, engine},
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: engine{manager, dirtyHandle, engine},
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colorRenderTargets{util::MergeInto<dirty::ManualDirtyState<ColorRenderTargetState>, engine::ColorTargetCount>(manager, engine.colorRenderTargetsRegisters)},
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colorRenderTargets{util::MergeInto<dirty::ManualDirtyState<ColorRenderTargetState>, engine::ColorTargetCount>(manager, engine.colorRenderTargetsRegisters)},
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depthRenderTarget{manager, engine.depthRenderTargetRegisters} {}
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depthRenderTarget{manager, engine.depthRenderTargetRegisters},
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rasterization{manager, engine.rasterizationRegisters} {}
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void PipelineState::Flush(InterconnectContext &ctx, StateUpdateBuilder &builder) {
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void PipelineState::Flush(InterconnectContext &ctx, StateUpdateBuilder &builder) {
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auto updateFunc{[&](auto &stateElem, auto &&... args) { stateElem.Update(ctx, args...); }};
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auto updateFunc{[&](auto &stateElem, auto &&... args) { stateElem.Update(ctx, args...); }};
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@ -497,7 +564,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
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auto vertexState{directState.vertexInput.Build(ctx, engine->vertexInputRegisters)};
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auto vertexState{directState.vertexInput.Build(ctx, engine->vertexInputRegisters)};
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auto inputAssemblyState{directState.inputAssembly.Build()};
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auto inputAssemblyState{directState.inputAssembly.Build()};
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auto tessellationState{directState.tessellationState.Build()};
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auto tessellationState{directState.tessellation.Build()};
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const auto &rasterizationState{rasterization.UpdateGet().rasterizationState};
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}
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}
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@ -142,6 +142,34 @@ namespace skyline::gpu::interconnect::maxwell3d {
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TessellationState tessellation;
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TessellationState tessellation;
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};
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};
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class RasterizationState : dirty::ManualDirty {
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public:
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struct EngineRegisters {
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const u32 &rasterEnable;
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const engine::PolygonMode &frontPolygonMode;
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const engine::PolygonMode &backPolygonMode;
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const u32 &oglCullEnable;
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const engine::CullFace &oglCullFace;
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const engine::WindowOrigin &windowOrigin;
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const engine::FrontFace &oglFrontFace;
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const engine::ViewportClipControl &viewportClipControl;
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const engine::PolyOffset &polyOffset;
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const engine::ProvokingVertex &provokingVertex;
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void DirtyBind(DirtyManager &manager, dirty::Handle handle) const;
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};
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private:
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dirty::BoundSubresource<EngineRegisters> engine;
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public:
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vk::StructureChain<vk::PipelineRasterizationStateCreateInfo, vk::PipelineRasterizationProvokingVertexStateCreateInfoEXT> rasterizationState;
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RasterizationState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine);
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void Flush();
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};
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/**
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/**
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* @brief Holds all GPU state for a pipeline, any changes to this will result in a pipeline cache lookup
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* @brief Holds all GPU state for a pipeline, any changes to this will result in a pipeline cache lookup
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*/
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*/
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@ -153,6 +181,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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VertexInputState::EngineRegisters vertexInputRegisters;
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VertexInputState::EngineRegisters vertexInputRegisters;
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InputAssemblyState::EngineRegisters inputAssemblyRegisters;
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InputAssemblyState::EngineRegisters inputAssemblyRegisters;
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TessellationState::EngineRegisters tessellationRegisters;
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TessellationState::EngineRegisters tessellationRegisters;
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RasterizationState::EngineRegisters rasterizationRegisters;
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void DirtyBind(DirtyManager &manager, dirty::Handle handle) const;
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void DirtyBind(DirtyManager &manager, dirty::Handle handle) const;
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};
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};
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@ -162,6 +191,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
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std::array<dirty::ManualDirtyState<ColorRenderTargetState>, engine::ColorTargetCount> colorRenderTargets;
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std::array<dirty::ManualDirtyState<ColorRenderTargetState>, engine::ColorTargetCount> colorRenderTargets;
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dirty::ManualDirtyState<DepthRenderTargetState> depthRenderTarget;
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dirty::ManualDirtyState<DepthRenderTargetState> depthRenderTarget;
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dirty::ManualDirtyState<RasterizationState> rasterization;
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public:
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public:
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DirectPipelineState directState;
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DirectPipelineState directState;
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@ -351,6 +351,13 @@ namespace skyline::soc::gm20b::engine::maxwell3d::type {
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Fill = 0x1B02, //!< Fill the area bounded by the vertices
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Fill = 0x1B02, //!< Fill the area bounded by the vertices
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};
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};
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struct PolyOffset {
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u32 pointEnable;
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u32 lineEnable;
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u32 fillEnable;
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};
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static_assert(sizeof(PolyOffset) == (0x3 * sizeof(u32)));
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/**
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/**
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* @brief A scissor which is used to reject all writes to non-masked regions
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* @brief A scissor which is used to reject all writes to non-masked regions
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* @note All coordinates are in screen-space as defined by the viewport
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* @note All coordinates are in screen-space as defined by the viewport
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@ -652,8 +659,8 @@ namespace skyline::soc::gm20b::engine::maxwell3d::type {
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})
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})
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enum class FrontFace : u32 {
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enum class FrontFace : u32 {
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Clockwise = 0x900,
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CW = 0x900,
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CounterClockwise = 0x901,
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CCW = 0x901,
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};
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};
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enum class CullFace : u32 {
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enum class CullFace : u32 {
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@ -662,18 +669,48 @@ namespace skyline::soc::gm20b::engine::maxwell3d::type {
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FrontAndBack = 0x408,
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FrontAndBack = 0x408,
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};
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};
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union ViewVolumeClipControl {
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union ViewportClipControl {
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u32 raw;
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u32 raw;
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enum class PixelZ : u8 {
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Clip = 0,
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Clamp = 1
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};
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enum class GuardbandScale : u8 {
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Scale256,
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Scale1
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};
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enum class GeometryClip : u8 {
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WZeroClip = 0,
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Passthru = 1,
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FrustrumXYClip = 2,
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FrustrumXYZClip = 3,
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WZeroClipNoZCull = 4,
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FrustrumZClip = 5,
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WZeroTriFillOrClip = 6
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};
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enum class GuardbandZScale : u8 {
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SameAsXYGuardband = 0,
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Scale256 = 1,
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Scale1 = 2
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};
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struct {
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struct {
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bool forceDepthRangeZeroToOne : 1;
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bool minZZeroMaxZOne : 1;
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u8 _unk0_ : 2;
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GuardbandZScale guardbandZScale : 2;
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bool depthClampNear : 1;
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PixelZ pixelMinZ : 1;
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bool depthClampFar : 1;
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PixelZ pixelMaxZ : 1;
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u8 _unk1_ : 6;
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u8 _pad1_ : 2;
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bool depthClampDisable : 1;
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GuardbandScale geometryGuardbandScale : 1;
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u8 _pad2_ : 2;
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GuardbandScale linePointCullGuardbandScale : 1;
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GeometryClip geometryClip : 3;
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u32 _pad3_ : 18;
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};
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};
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};
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};
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static_assert(sizeof(ViewVolumeClipControl) == sizeof(u32));
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static_assert(sizeof(ViewportClipControl) == sizeof(u32));
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union ColorWriteMask {
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union ColorWriteMask {
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u32 raw;
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u32 raw;
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@ -880,6 +917,15 @@ namespace skyline::soc::gm20b::engine::maxwell3d::type {
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};
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};
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static_assert(sizeof(SetProgramInfo) == (sizeof(u32) * 0x10));
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static_assert(sizeof(SetProgramInfo) == (sizeof(u32) * 0x10));
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struct ProvokingVertex {
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enum class Value : u8 {
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First = 0,
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Last = 1,
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} value : 1;
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u32 _pad_ : 31;
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};
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static_assert(sizeof(ProvokingVertex) == sizeof(u32));
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struct ZtLayer {
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struct ZtLayer {
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u16 offset;
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u16 offset;
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u16 _pad_;
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u16 _pad_;
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@ -19,6 +19,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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.vertexInputRegisters = {*registers.vertexStreams, *registers.vertexStreamInstance, *registers.vertexAttributes},
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.vertexInputRegisters = {*registers.vertexStreams, *registers.vertexStreamInstance, *registers.vertexAttributes},
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.inputAssemblyRegisters = {*registers.primitiveRestartEnable},
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.inputAssemblyRegisters = {*registers.primitiveRestartEnable},
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.tessellationRegisters = {*registers.patchSize, *registers.tessellationParameters},
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.tessellationRegisters = {*registers.patchSize, *registers.tessellationParameters},
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.rasterizationRegisters = {*registers.rasterEnable, *registers.frontPolygonMode, *registers.backPolygonMode, *registers.oglCullEnable, *registers.oglCullFace, *registers.windowOrigin, *registers.oglFrontFace, *registers.viewportClipControl, *registers.polyOffset, *registers.provokingVertex},
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};
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};
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}
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}
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@ -115,7 +115,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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Register<0xC8, type::TessellationParameters> tessellationParameters;
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Register<0xC8, type::TessellationParameters> tessellationParameters;
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Register<0xDF, u32> rasterizerEnable;
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Register<0xDF, u32> rasterEnable;
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Register<0xE0, std::array<type::StreamOutBuffer, type::StreamOutBufferCount>> streamOutBuffers;
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Register<0xE0, std::array<type::StreamOutBuffer, type::StreamOutBufferCount>> streamOutBuffers;
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Register<0x1C0, std::array<type::TransformFeedbackBufferState, type::StreamOutBufferCount>> transformFeedbackBufferStates;
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Register<0x1C0, std::array<type::TransformFeedbackBufferState, type::StreamOutBufferCount>> transformFeedbackBufferStates;
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@ -127,7 +127,6 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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Register<0x35B, type::ClearRect> clearRect;
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Register<0x35B, type::ClearRect> clearRect;
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Register<0x35D, u32> vertexArrayStart; //!< The first vertex to draw
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Register<0x35D, u32> vertexArrayStart; //!< The first vertex to draw
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struct DrawVertexArray {
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struct DrawVertexArray {
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@ -142,11 +141,10 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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Register<0x364, float> zClearValue;
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Register<0x364, float> zClearValue;
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Register<0x368, u32> stencilClearValue;
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Register<0x368, u32> stencilClearValue;
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struct PolygonMode {
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Register<0x36B, type::PolygonMode> frontPolygonMode;
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type::PolygonMode front; // 0x36B
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Register<0x36C, type::PolygonMode> backPolygonMode;
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type::PolygonMode back; // 0x36C
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};
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Register<0x370, type::PolyOffset> polyOffset;
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Register<0x36B, PolygonMode> polygonMode;
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Register<0x373, u32> patchSize;
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Register<0x373, u32> patchSize;
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@ -310,7 +308,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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Register<0x591, u32> primitiveRestartEnable;
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Register<0x591, u32> primitiveRestartEnable;
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Register<0x592, u32> primitiveRestartIndex;
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Register<0x592, u32> primitiveRestartIndex;
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Register<0x5A1, u32> provokingVertexIsLast;
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Register<0x5A1, type::ProvokingVertex> provokingVertex;
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Register<0x5E7, type::ZtLayer> ztLayer;
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Register<0x5E7, type::ZtLayer> ztLayer;
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@ -325,13 +323,13 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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Register<0x620, std::array<type::VertexStreamInstance, type::VertexStreamCount>> vertexStreamInstance; //!< A per-VBO boolean denoting if the vertex input rate should be per vertex or per instance
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Register<0x620, std::array<type::VertexStreamInstance, type::VertexStreamCount>> vertexStreamInstance; //!< A per-VBO boolean denoting if the vertex input rate should be per vertex or per instance
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Register<0x646, u32> cullFaceEnable;
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Register<0x646, u32> oglCullEnable;
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Register<0x647, type::FrontFace> frontFace;
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Register<0x647, type::FrontFace> oglFrontFace;
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Register<0x648, type::CullFace> cullFace;
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Register<0x648, type::CullFace> oglCullFace;
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Register<0x649, u32> pixelCentreImage;
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Register<0x649, u32> pixelCentreImage;
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Register<0x64B, u32> viewportScaleOffsetEnable;
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Register<0x64B, u32> viewportScaleOffsetEnable;
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Register<0x64F, type::ViewVolumeClipControl> viewVolumeClipControl;
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Register<0x64F, type::ViewportClipControl> viewportClipControl;
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Register<0x652, type::PrimitiveTopologyControl> primitiveTopologyControl;
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Register<0x652, type::PrimitiveTopologyControl> primitiveTopologyControl;
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Register<0x65C, type::PrimitiveTopology> primitiveTopology;
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Register<0x65C, type::PrimitiveTopology> primitiveTopology;
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