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Add exceptions for some more unimplemented maxwell draw regs
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@ -271,6 +271,18 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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throw exception("drawInlineIndex2X16 not implemented!");
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throw exception("drawInlineIndex2X16 not implemented!");
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})
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})
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ENGINE_STRUCT_CASE(drawZeroIndex, count, {
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throw exception("drawZeroIndex not implemented!");
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})
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ENGINE_STRUCT_CASE(drawAuto, byteCount, {
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throw exception("drawAuto not implemented!");
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})
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ENGINE_CASE(drawInlineIndex, {
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throw exception("drawInlineIndex not implemented!");
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})
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ENGINE_STRUCT_CASE(drawIndexBuffer, count, {
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ENGINE_STRUCT_CASE(drawIndexBuffer, count, {
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// Defer the draw until the first non-draw operation to allow for detecting instanced draws (see DeferredDrawState comment)
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// Defer the draw until the first non-draw operation to allow for detecting instanced draws (see DeferredDrawState comment)
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deferredDraw.Set(count, registers.indexBuffer->first,
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deferredDraw.Set(count, registers.indexBuffer->first,
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@ -198,6 +198,11 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
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Register<0x48A, type::ZtSize> ztSize;
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Register<0x48A, type::ZtSize> ztSize;
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struct DrawAuto {
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u32 byteCount;
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};
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Register<0x48F, DrawAuto> drawAuto;
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Register<0x48D, type::SamplerBinding> samplerBinding; //!< If enabled, the TSC index in a bindless texture handle is ignored and the TIC index is used as the TSC index, otherwise the TSC index from the bindless texture handle is used
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Register<0x48D, type::SamplerBinding> samplerBinding; //!< If enabled, the TSC index in a bindless texture handle is ignored and the TIC index is used as the TSC index, otherwise the TSC index from the bindless texture handle is used
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Register<0x490, std::array<u32, 8>> postVtgShaderAttributeSkipMask;
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Register<0x490, std::array<u32, 8>> postVtgShaderAttributeSkipMask;
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