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Implicitly decompose Address into u64

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The semantics of implicitly decomposing the `Address` class into a `u64` were determined to be appropriate for the class. As it is an integer type this effectively retains all semantics from using an integer directly for the most part.
This commit is contained in:
PixelyIon 2021-11-16 09:45:20 +05:30
parent 48d0b41f16
commit 73646c4da8
2 changed files with 4 additions and 3 deletions
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3
app/src/main/cpp/skyline/soc/gm20b/engines/maxwell/types.h
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@ -11,12 +11,13 @@ namespace skyline::soc::gm20b::engine::maxwell3d::type {
/**
* @brief A 40-bit GMMU virtual address with register-packing
* @note The registers pack the address with big-endian ordering (but with 32 bit words)
*/
struct Address {
u32 high;
u32 low;
u64 Pack() {
operator u64() {
return (static_cast<u64>(high) << 32) | low;
}
};

4
app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.cpp
View File

@ -450,7 +450,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
switch (registers.semaphore->info.structureSize) {
case type::SemaphoreInfo::StructureSize::OneWord:
channelCtx.asCtx->gmmu.Write<u32>(registers.semaphore->address.Pack(), static_cast<u32>(result));
channelCtx.asCtx->gmmu.Write<u32>(registers.semaphore->address, static_cast<u32>(result));
break;
case type::SemaphoreInfo::StructureSize::FourWords: {
@ -461,7 +461,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
i64 nsTime{util::GetTimeNs()};
i64 timestamp{(nsTime / NsToTickDenominator) * NsToTickNumerator + ((nsTime % NsToTickDenominator) * NsToTickNumerator) / NsToTickDenominator};
channelCtx.asCtx->gmmu.Write<FourWordResult>(registers.semaphore->address.Pack(),
channelCtx.asCtx->gmmu.Write<FourWordResult>(registers.semaphore->address,
FourWordResult{result, static_cast<u64>(timestamp)});
break;
}