mirror of
https://github.com/skyline-emu/skyline.git
synced 2024-11-04 23:15:08 +01:00
Code clean up by friendly neighborhood Cyuubi
This commit is contained in:
parent
985f2e67a2
commit
7dd04afdcf
@ -6,26 +6,18 @@
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#include "switch/device.h"
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#include "switch/common.h"
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std::thread *game_thread;
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void signal_handle(int sig_no) {
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throw lightSwitch::exception("A signal has been raised: " + std::to_string(sig_no));
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}
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std::thread *emu_thread;
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void thread_main(std::string rom_path, std::string pref_path, std::string log_path) {
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auto log = std::make_shared<lightSwitch::Logger>(log_path);
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log->write(lightSwitch::Logger::INFO, "Launching ROM {0}", rom_path);
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// long long i = 0;
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// while(true){
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// log->write(lightSwitch::Logger::INFO, "#{0}", i);
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// sleep(1);
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// i++;
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// }
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auto settings = std::make_shared<lightSwitch::Settings>(pref_path);
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try {
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lightSwitch::device device(log, settings);
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device.run(rom_path);
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log->write(lightSwitch::Logger::INFO, "Emulation has ended!");
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log->write(lightSwitch::Logger::INFO, "Emulation has ended.");
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} catch (std::exception &e) {
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log->write(lightSwitch::Logger::ERROR, e.what());
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} catch (...) {
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@ -40,10 +32,11 @@ Java_emu_lightswitch_MainActivity_loadFile(JNIEnv *env, jobject instance, jstrin
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const char *rom_path = env->GetStringUTFChars(rom_path_, 0);
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const char *pref_path = env->GetStringUTFChars(pref_path_, 0);
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const char *log_path = env->GetStringUTFChars(log_path_, 0);
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// std::signal(SIGABRT, signal_handle);
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if (game_thread) pthread_kill(game_thread->native_handle(), SIGABRT);
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if (emu_thread) pthread_kill(emu_thread->native_handle(), SIGABRT);
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// Running on UI thread is not a good idea, any crashes and such will be propagated
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game_thread = new std::thread(thread_main, std::string(rom_path, strlen(rom_path)), std::string(pref_path, strlen(pref_path)), std::string(log_path, strlen(log_path)));
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emu_thread = new std::thread(thread_main, std::string(rom_path, strlen(rom_path)), std::string(pref_path, strlen(pref_path)), std::string(log_path, strlen(log_path)));
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env->ReleaseStringUTFChars(rom_path_, rom_path);
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env->ReleaseStringUTFChars(pref_path_, pref_path);
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env->ReleaseStringUTFChars(log_path_, log_path);
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@ -63,9 +63,8 @@ namespace lightSwitch {
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struct device_state {
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std::shared_ptr<hw::Cpu> cpu;
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std::shared_ptr<hw::Memory> mem;
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std::shared_ptr<hw::Memory> memory;
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std::shared_ptr<Settings> settings;
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std::shared_ptr<Logger> logger;
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};
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//typedef std::shared_ptr<device_state_struct> device_state;
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}
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@ -23,7 +23,6 @@ namespace lightSwitch {
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namespace instr {
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// https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/brk-breakpoint-instruction
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// For some reason if value is set to uint16_t it isn't read correctly ?
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struct brk {
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brk(uint16_t val) {
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start = 0x0; // First 5 bits of an BRK instruction are 0
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@ -35,9 +34,9 @@ namespace lightSwitch {
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return (start == 0x0 && end == 0x6A1);
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}
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uint8_t start:5;
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uint32_t value:16;
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uint16_t end:11;
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uint8_t start : 5;
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uint32_t value : 16;
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uint16_t end : 11;
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};
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// https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/svc-supervisor-call
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@ -46,9 +45,9 @@ namespace lightSwitch {
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return (start == 0x1 && end == 0x6A0);
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}
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uint8_t start:5;
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uint32_t value:16;
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uint16_t end:11;
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uint8_t start : 5;
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uint32_t value : 16;
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uint16_t end : 11;
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};
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// https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/mrs-move-system-register
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@ -57,16 +56,12 @@ namespace lightSwitch {
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return (end == 0xD53);
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}
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uint8_t Xt:5;
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uint32_t Sreg:15;
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uint16_t end:12;
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uint8_t dst_reg : 5;
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uint32_t src_reg : 15;
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uint16_t end : 12;
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};
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};
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enum xreg {
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x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30
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};
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enum wreg {
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w0, w1, w2, w3, w4, w5, w6, w7, w8, w9, w10, w11, w12, w13, w14, w15, w16, w17, w18, w19, w20, w21, w22, w23, w24, w25, w26, w27, w28, w29, w30
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};
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enum xreg { x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30 };
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enum wreg { w0, w1, w2, w3, w4, w5, w6, w7, w8, w9, w10, w11, w12, w13, w14, w15, w16, w17, w18, w19, w20, w21, w22, w23, w24, w25, w26, w27, w28, w29, w30 };
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}
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@ -10,27 +10,18 @@ namespace lightSwitch {
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std::shared_ptr<hw::Memory> memory;
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os::OS os;
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device_state state;
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const std::map<std::string, int> ext_case = {
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{"nro", 1},
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{"NRO", 1}
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};
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public:
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device(std::shared_ptr<Logger> &logger, std::shared_ptr<Settings> &settings) : cpu(new hw::Cpu()), memory(new hw::Memory()), state{cpu, memory, settings, logger}, os({cpu, memory, settings, logger}) {};
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void run(std::string rom_file) {
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try {
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switch (ext_case.at(rom_file.substr(rom_file.find_last_of('.') + 1))) {
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case 1: {
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loader::NroLoader loader(rom_file, state);
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break;
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}
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default:
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break;
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}
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cpu->Execute(hw::Memory::text, memory, os.SvcHandler, &state);
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} catch (std::out_of_range &e) {
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throw exception("The ROM extension wasn't recognized.");
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}
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std::string rom_ext = rom_file.substr(rom_file.find_last_of('.') + 1);
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std::transform(rom_ext.begin(), rom_ext.end(), rom_ext.begin(),
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[](unsigned char c){ return std::tolower(c); });
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if (rom_ext == "nro") loader::NroLoader loader(rom_file, state);
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else throw exception("Unsupported ROM extension.");
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cpu->Execute(hw::Memory::text, memory, os.SvcHandler, &state);
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}
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};
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};
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@ -8,30 +8,30 @@ namespace lightSwitch::hw {
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long *Cpu::ReadMemory(uint64_t address) { // Return a single word (32-bit)
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status = ptrace(PTRACE_PEEKDATA, child, address, NULL);
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if (status == -1) throw std::runtime_error("Cannot read memory");
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if (status == -1) throw std::runtime_error("Cannot read memory!");
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return &status;
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}
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void Cpu::WriteMemory(uint64_t address) { // Write a single word (32-bit)
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status = ptrace(PTRACE_GETREGSET, child, NT_PRSTATUS, &iov);
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if (status == -1) throw std::runtime_error("Cannot write memory");
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if (status == -1) throw std::runtime_error("Cannot write memory!");
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}
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void Cpu::ReadRegisters() { // Read all registers into 'regs'
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iov = {®s, sizeof(regs)};
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status = ptrace(PTRACE_GETREGSET, child, NT_PRSTATUS, &iov);
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if (status == -1) throw std::runtime_error("Cannot read registers");
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if (status == -1) throw std::runtime_error("Cannot read registers!");
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}
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void Cpu::WriteRegisters() { // Write all registers from 'regs'
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iov = {®s, sizeof(regs)};
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status = ptrace(PTRACE_SETREGSET, child, NT_PRSTATUS, &iov);
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if (status == -1) throw std::runtime_error("Cannot write registers");
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if (status == -1) throw std::runtime_error("Cannot write registers!");
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}
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void Cpu::ResumeProcess() { // Resumes a process stopped due to a signal
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status = ptrace(PTRACE_CONT, child, NULL, NULL);
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if (status == -1) throw std::runtime_error("Cannot resume process");
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if (status == -1) throw std::runtime_error("Cannot resume process!");
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}
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void Cpu::WriteBreakpoint(uint64_t address_, uint64_t size) {
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@ -39,13 +39,20 @@ namespace lightSwitch::hw {
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for (uint64_t iter = 0; iter < size; iter++) {
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auto instr_svc = reinterpret_cast<instr::svc *>(address + iter);
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auto instr_mrs = reinterpret_cast<instr::mrs *>(address + iter);
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if (instr_svc->verify()) {
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// syslog(LOG_WARNING, "Found SVC call: 0x%X, At location 0x%X", instr_svc->value, ((uint64_t)address)+iter);
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#ifdef NDEBUG
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syslog(LOG_WARNING, "Found SVC call: 0x%X, At location 0x%X", instr_svc->value, ((uint64_t)address)+iter);
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#endif
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instr::brk brk(static_cast<uint16_t>(instr_svc->value));
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address[iter] = *reinterpret_cast<uint32_t *>(&brk);
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} else if (instr_mrs->verify() && instr_mrs->Sreg == constant::tpidrro_el0) {
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// syslog(LOG_WARNING, "Found MRS call: 0x%X, At location 0x%X", instr_mrs->Xt, ((uint64_t)address)+iter);
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instr::brk brk(static_cast<uint16_t>(constant::svc_last + 1 + instr_mrs->Xt));
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} else if (instr_mrs->verify() && instr_mrs->src_reg == constant::tpidrro_el0) {
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#ifdef NDEBUG
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syslog(LOG_WARNING, "Found MRS call: 0x%X, At location 0x%X", instr_mrs->dst_reg, ((uint64_t)address)+iter);
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#endif
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instr::brk brk(static_cast<uint16_t>(constant::svc_last + 1 + instr_mrs->dst_reg));
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address[iter] = *reinterpret_cast<uint32_t *>(&brk);
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}
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}
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@ -53,22 +60,31 @@ namespace lightSwitch::hw {
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void Cpu::Execute(Memory::Region region, std::shared_ptr<Memory> memory, std::function<void(uint16_t, void *)> svc_handler, void *device) {
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tls = memory->region_map.at(hw::Memory::tls).address;
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hw::Memory::RegionData rom = memory->region_map.at(hw::Memory::text);
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WriteBreakpoint(rom.address, rom.size);
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child = ExecuteChild(rom.address);
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hw::Memory::RegionData exec = memory->region_map.at(hw::Memory::text);
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WriteBreakpoint(exec.address, exec.size);
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child = ExecuteChild(exec.address);
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int stat = 0;
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while (waitpid(child, &stat, 0)) {
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if (WIFSTOPPED(stat)) {
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ReadRegisters();
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//syslog(LOG_INFO, "PC is at 0x%X", regs.pc);
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#ifdef NDEBUG
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syslog(LOG_INFO, "PC is at 0x%X", regs.pc);
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#endif
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if (!regs.pc || regs.pc == 0xBADC0DE) break;
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// We store the instruction value as the immediate value. 0x0 to 0x7F are SVC, 0x80 to 0x9E is MRS for TPIDRRO_EL0.
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auto instr = reinterpret_cast<instr::brk *>(ReadMemory(regs.pc));
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if (instr->verify()) {
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if (instr->value <= constant::svc_last) {
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svc_handler(static_cast<uint16_t>(instr->value), device);
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syslog(LOG_ERR, "SVC has been called 0x%X", instr->value);
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if (stop) break;
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if (halt) break;
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} else if (instr->value > constant::svc_last && instr->value <= constant::svc_last + constant::num_regs) {
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// Catch MRS that reads the value of TPIDRRO_EL0 (TLS)
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// https://switchbrew.org/wiki/Thread_Local_Storage
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@ -76,27 +92,30 @@ namespace lightSwitch::hw {
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syslog(LOG_ERR, "MRS has been called 0x%X", instr->value - (constant::svc_last + 1));
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} else syslog(LOG_ERR, "Received unhandled BRK 0x%X", instr->value);
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}
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regs.pc += 4; // Increment program counter by a single instruction (32 bits)
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WriteRegisters();
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} else if (WIFEXITED(stat))
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break;
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} else if (WIFEXITED(stat)) break;
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ResumeProcess();
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}
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kill(child, SIGABRT);
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child = 0;
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stop = false;
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halt = false; // TODO: Global variable
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}
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pid_t Cpu::ExecuteChild(uint64_t address) {
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pid_t pid = fork();
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if (!pid) {
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ptrace(PTRACE_TRACEME, 0, NULL, NULL);
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asm volatile("BR %0"::"r"(address));
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asm volatile("br %0" :: "r"(address));
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}
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return pid;
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}
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void Cpu::StopExecution() { stop = true; }
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void Cpu::StopExecution() { halt = true; }
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uint64_t Cpu::GetRegister(xreg reg_id) {
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return regs.regs[reg_id];
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@ -13,7 +13,7 @@
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namespace lightSwitch::hw {
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class Cpu {
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private:
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bool stop = false;
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bool halt = false;
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long status = 0;
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pid_t child;
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iovec iov;
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@ -13,19 +13,23 @@ namespace lightSwitch::hw {
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void *ptr = mmap((void *) address, size, PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_ANON | MAP_FIXED, 0, 0);
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if (ptr == MAP_FAILED)
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throw exception("An occurred while mapping region: " + std::string(strerror(errno)));
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region_map.insert(std::pair<Region, RegionData>(region, {address, size}));
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}
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void Memory::Remap(Region region, size_t size) {
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RegionData region_data = region_map.at(region);
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void *ptr = mremap(reinterpret_cast<void *>(region_data.address), region_data.size, size, 0);
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if (ptr == MAP_FAILED)
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throw exception("An occurred while remapping region: " + std::string(strerror(errno)));
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region_map[region].size = size;
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}
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void Memory::Unmap(Region region) {
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RegionData region_data = region_map.at(region);
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int err = munmap(reinterpret_cast<void *>(region_data.address), region_data.size);
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if (err == -1)
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throw exception("An occurred while unmapping region: " + std::string(strerror(errno)));
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@ -6,7 +6,7 @@ namespace lightSwitch::loader {
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NroHeader header{};
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ReadOffset((uint32_t *) &header, 0x0, sizeof(NroHeader));
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if (header.magic != constant::nro_magic)
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throw exception(fmt::format("Invalid NRO magic 0x{0:x}", header.magic));
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throw exception(fmt::format("Invalid NRO magic! 0x{0:X}", header.magic));
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auto text = new uint32_t[header.text.size]();
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auto ro = new uint32_t[header.ro.size]();
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@ -16,18 +16,25 @@ namespace lightSwitch::loader {
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ReadOffset(ro, header.ro.offset, header.ro.size);
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ReadOffset(data, header.data.offset, header.data.size);
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state.mem->Map(constant::base_addr, header.text.size, hw::Memory::text);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .text to 0x{0:x}, size is 0x{1:x}.", constant::base_addr, header.text.size);
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state.mem->Map(constant::base_addr + header.text.size, header.ro.size, hw::Memory::rodata);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .ro to 0x{0:x}, size is 0x{1:x}.", constant::base_addr + header.text.size, header.ro.size);
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state.mem->Map(constant::base_addr + header.text.size + header.ro.size, header.data.size, hw::Memory::data);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .data to 0x{0:x}, size is 0x{1:x}.", constant::base_addr + header.text.size + header.ro.size, header.data.size);
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state.mem->Map(constant::base_addr + header.text.size + header.ro.size + header.data.size, header.bssSize, hw::Memory::bss);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .bss to 0x{0:x}, size is 0x{1:x}.", constant::base_addr + header.text.size + header.ro.size + header.data.size, header.bssSize);
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state.memory->Map(constant::base_addr, header.text.size, hw::Memory::text);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .text @ 0x{0:X}, Size = 0x{1:X}",
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constant::base_addr, header.text.size);
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state.mem->Write(text, constant::base_addr, header.text.size);
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state.mem->Write(ro, constant::base_addr + header.text.size, header.ro.size);
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state.mem->Write(data, constant::base_addr + header.text.size + header.ro.size, header.data.size);
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state.memory->Map(constant::base_addr + header.text.size, header.ro.size, hw::Memory::rodata);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .ro @ 0x{0:X}, Size = 0x{1:X}",
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constant::base_addr + header.text.size, header.ro.size);
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state.memory->Map(constant::base_addr + header.text.size + header.ro.size, header.data.size, hw::Memory::data);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .data @ 0x{0:X}, Size = 0x{1:X}",
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constant::base_addr + header.text.size + header.ro.size, header.data.size);
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state.memory->Map(constant::base_addr + header.text.size + header.ro.size + header.data.size, header.bssSize, hw::Memory::bss);
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state.logger->write(Logger::DEBUG, "Successfully mapped region .bss @ 0x{0:X}, Size = 0x{1:X}",
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constant::base_addr + header.text.size + header.ro.size + header.data.size, header.bssSize);
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state.memory->Write(text, constant::base_addr, header.text.size);
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state.memory->Write(ro, constant::base_addr + header.text.size, header.ro.size);
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state.memory->Write(data, constant::base_addr + header.text.size + header.ro.size, header.data.size);
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delete[] text;
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delete[] ro;
|
||||
|
@ -13,12 +13,12 @@ namespace lightSwitch::os::ipc {
|
||||
data_pos = ((data_pos - 1) & ~(15U)) + 16; // ceil data_pos with multiples 16
|
||||
data_ptr = &tls_ptr[data_pos + sizeof(command_struct)];
|
||||
|
||||
state.logger->write(Logger::DEBUG, "Type: 0x{:x}", (uint8_t) req_info->type);
|
||||
state.logger->write(Logger::DEBUG, "Type: 0x{:X}", (uint8_t) req_info->type);
|
||||
state.logger->write(Logger::DEBUG, "X descriptors: {}", (uint8_t) req_info->x_no);
|
||||
state.logger->write(Logger::DEBUG, "A descriptors: {}", (uint8_t) req_info->a_no);
|
||||
state.logger->write(Logger::DEBUG, "B descriptors: {}", (uint8_t) req_info->b_no);
|
||||
state.logger->write(Logger::DEBUG, "W descriptors: {}", (uint8_t) req_info->w_no);
|
||||
state.logger->write(Logger::DEBUG, "Raw data offset: 0x{:x}", data_pos);
|
||||
state.logger->write(Logger::DEBUG, "Raw data offset: 0x{:X}", data_pos);
|
||||
state.logger->write(Logger::DEBUG, "Raw data size: {}", (uint16_t) req_info->data_sz);
|
||||
state.logger->write(Logger::DEBUG, "Payload Command ID: {}", *((uint32_t *) &tls_ptr[data_pos + 8]));
|
||||
}
|
||||
|
@ -9,7 +9,7 @@ namespace lightSwitch::os {
|
||||
if (svc::svcTable[svc])
|
||||
(*svc::svcTable[svc])(state);
|
||||
else {
|
||||
state.logger->write(Logger::ERROR, "Unimplemented SVC 0x{0:x}", svc);
|
||||
state.logger->write(Logger::ERROR, "Unimplemented SVC 0x{0:X}", svc);
|
||||
state.cpu->StopExecution();
|
||||
}
|
||||
}
|
||||
|
@ -7,28 +7,35 @@
|
||||
namespace lightSwitch::os::svc {
|
||||
void ConnectToNamedPort(device_state &state) {
|
||||
char port[constant::port_size]{0};
|
||||
state.mem->Read(port, state.cpu->GetRegister(xreg::x1), constant::port_size);
|
||||
state.memory->Read(port, state.cpu->GetRegister(xreg::x1), constant::port_size);
|
||||
|
||||
if (std::strcmp(port, "sm:") == 0)
|
||||
state.cpu->SetRegister(wreg::w1, constant::sm_handle);
|
||||
else {
|
||||
state.logger->write(Logger::ERROR, "svcConnectToNamedPort tried connecting to invalid port \"{0}\"", port);
|
||||
state.cpu->StopExecution();
|
||||
}
|
||||
|
||||
state.cpu->SetRegister(wreg::w0, 0);
|
||||
}
|
||||
|
||||
void SendSyncRequest(device_state &state) {
|
||||
state.logger->write(Logger::DEBUG, "svcSendSyncRequest called for handle 0x{0:x}.", state.cpu->GetRegister(xreg::x0));
|
||||
state.logger->write(Logger::DEBUG, "svcSendSyncRequest called for handle 0x{0:X}.", state.cpu->GetRegister(xreg::x0));
|
||||
|
||||
uint8_t tls[constant::tls_ipc_size];
|
||||
state.mem->Read(&tls, constant::tls_addr, constant::tls_ipc_size);
|
||||
state.memory->Read(&tls, constant::tls_addr, constant::tls_ipc_size);
|
||||
|
||||
ipc::IpcRequest request(tls, state);
|
||||
|
||||
state.cpu->SetRegister(wreg::w0, 0);
|
||||
}
|
||||
|
||||
void OutputDebugString(device_state &state) {
|
||||
std::string debug(state.cpu->GetRegister(xreg::x1), '\0');
|
||||
state.mem->Read((void *) debug.data(), state.cpu->GetRegister(xreg::x0), state.cpu->GetRegister(xreg::x1));
|
||||
state.logger->write(Logger::INFO, "ROM Output: {0}", debug.c_str());
|
||||
state.memory->Read((void *) debug.data(), state.cpu->GetRegister(xreg::x0), state.cpu->GetRegister(xreg::x1));
|
||||
|
||||
state.logger->write(Logger::INFO, "svcOutputDebugString: {0}", debug.c_str());
|
||||
|
||||
state.cpu->SetRegister(wreg::w0, 0);
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user