mirror of
https://github.com/skyline-emu/skyline.git
synced 2024-11-04 23:35:12 +01:00
Address CR Comments #2
This commit is contained in:
parent
fbf9f06244
commit
8564edcb16
@ -37,7 +37,6 @@ namespace skyline {
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std::lock_guard guard(mtx);
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logFile << "0|" << str << "\n";
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logFile.flush();
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}
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void Logger::Write(LogLevel level, std::string str) {
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@ -55,7 +54,6 @@ namespace skyline {
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std::lock_guard guard(mtx);
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logFile << "1|" << levelCharacter[static_cast<u8>(level)] << '|' << threadName << '|' << str << '\n';
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logFile.flush();
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}
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DeviceState::DeviceState(kernel::OS *os, std::shared_ptr<JvmManager> jvmManager, std::shared_ptr<Settings> settings, std::shared_ptr<Logger> logger)
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@ -96,7 +96,7 @@ namespace skyline {
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* @note There's the exception of signed char pointers as they represent C Strings
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* @note This does not cover std::shared_ptr or std::unique_ptr and those will have to be explicitly casted to uintptr_t or passed through fmt::ptr
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*/
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template<class T>
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template<typename T>
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constexpr auto FmtCast(T object) {
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if constexpr (std::is_pointer<T>::value)
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if constexpr (std::is_same<char, typename std::remove_cv<typename std::remove_pointer<T>::type>::type>::value)
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@ -147,12 +147,12 @@ namespace skyline {
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/**
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* @brief A way to implicitly convert a pointer to uintptr_t and leave it unaffected if it isn't a pointer
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*/
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template<class T>
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template<typename T>
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T PointerValue(T item) {
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return item;
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}
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template<class T>
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template<typename T>
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uintptr_t PointerValue(T *item) {
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return reinterpret_cast<uintptr_t>(item);
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}
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@ -160,7 +160,7 @@ namespace skyline {
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/**
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* @brief A way to implicitly convert an integral to a pointer, if the return type is a pointer
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*/
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template<class Return, class T>
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template<typename Return, typename T>
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Return ValuePointer(T item) {
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if constexpr (std::is_pointer<Return>::value)
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return reinterpret_cast<Return>(item);
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@ -253,7 +253,7 @@ namespace skyline {
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return result;
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}
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template<class Type>
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template<typename Type>
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constexpr Type HexStringToInt(std::string_view string) {
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if (string.size() > sizeof(Type) * 2)
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throw exception("String size larger than type: {} (sizeof(Type): {})", string.size(), sizeof(Type));
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@ -299,7 +299,7 @@ namespace skyline {
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/**
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* @brief We want to support implicitly casting from std::string_view -> span as it is just a specialization of a data view which span is a generic form of, the opposite doesn't hold true as not all data held by a span is string data therefore the conversion isn't implicit there
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*/
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template<class Traits>
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template<typename Traits>
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constexpr span(const std::basic_string_view<T, Traits> &string) : std::span<T, Extent>(const_cast<T *>(string.data()), string.size()) {}
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template<typename Out>
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@ -375,21 +375,21 @@ namespace skyline {
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/**
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* @brief Deduction guides required for arguments to span, CTAD will fail for iterators, arrays and containers without this
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*/
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template<class It, class End, size_t Extent = std::dynamic_extent>
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template<typename It, typename End, size_t Extent = std::dynamic_extent>
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span(It, End) -> span<typename std::iterator_traits<It>::value_type, Extent>;
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template<class T, size_t Size>
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template<typename T, size_t Size>
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span(T (&)[Size]) -> span<T, Size>;
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template<class T, size_t Size>
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template<typename T, size_t Size>
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span(std::array<T, Size> &) -> span<T, Size>;
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template<class T, size_t Size>
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template<typename T, size_t Size>
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span(const std::array<T, Size> &) -> span<const T, Size>;
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template<class Container>
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template<typename Container>
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span(Container &) -> span<typename Container::value_type>;
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template<class Container>
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template<typename Container>
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span(const Container &) -> span<const typename Container::value_type>;
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/**
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* @brief The Logger class is to write log output to file and logcat
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* @brief A wrapper around writing logs into a log file and logcat using Android Log APIs
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*/
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class Logger {
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private:
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@ -21,6 +21,9 @@ namespace skyline {
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std::condition_variable produceCondition;
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public:
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/**
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* @note The internal allocation is an item larger as we require a sentinel value
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*/
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inline CircularQueue(size_t size) : vector((size + 1) * sizeof(Type)) {}
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inline CircularQueue(const CircularQueue &) = delete;
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@ -46,7 +46,7 @@ namespace skyline::signal {
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void ExceptionalSignalHandler(int signal, siginfo *info, ucontext *context) {
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SignalException signalException;
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signalException.signal = signal;
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signalException.pc = context->uc_mcontext.pc;
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signalException.pc = reinterpret_cast<void *>(context->uc_mcontext.pc);
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if (signal == SIGSEGV)
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signalException.fault = info->si_addr;
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SignalExceptionPtr = std::make_exception_ptr(signalException);
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@ -14,14 +14,14 @@ namespace skyline::signal {
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class SignalException {
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public:
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int signal{};
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u64 pc{};
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void* pc{};
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void *fault{};
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inline std::string what() const {
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if (!fault)
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return fmt::format("Signal: {} (PC: 0x{:X})", strsignal(signal), pc);
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return fmt::format("Signal: {} (PC: 0x{:X})", strsignal(signal), reinterpret_cast<uintptr_t>(pc));
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else
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return fmt::format("Signal: {} @ 0x{:X} (PC: 0x{:X})", strsignal(signal), reinterpret_cast<uintptr_t>(fault), pc);
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return fmt::format("Signal: {} @ 0x{:X} (PC: 0x{:X})", strsignal(signal), reinterpret_cast<uintptr_t>(fault), reinterpret_cast<uintptr_t>(pc));
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}
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};
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@ -94,7 +94,7 @@ namespace skyline::kernel::ipc {
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payloadOffset = cmdArg;
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if (payload->magic != util::MakeMagic<u32>("SFCI") && (header->type != CommandType::Control && header->type != CommandType::ControlWithContext)) // SFCI is the magic in received IPC messages
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if (payload->magic != util::MakeMagic<u32>("SFCI") && (header->type != CommandType::Control && header->type != CommandType::ControlWithContext && header->type != CommandType::Close) && (!domain || domain->command != DomainCommand::CloseVHandle)) // SFCI is the magic in received IPC messages
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state.logger->Debug("Unexpected Magic in PayloadHeader: 0x{:X}", static_cast<u32>(payload->magic));
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pointer += constant::IpcPaddingSum - padding + cBufferLengthSize;
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@ -7,12 +7,17 @@
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namespace skyline {
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namespace memory {
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struct Permission {
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union Permission {
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/**
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* @brief Initializes all permissions to false
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*/
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constexpr Permission() : r(), w(), x() {}
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/**
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* @brief Initializes permissions where the first three bits correspond to RWX
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*/
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constexpr explicit Permission(u8 raw) : raw(raw) {}
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/**
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* @param read If memory has read permission
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* @param write If memory has write permission
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@ -38,10 +43,14 @@ namespace skyline {
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return perm;
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}
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bool r; //!< The permission to read
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bool w; //!< The permission to write
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bool x; //!< The permission to execute
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struct {
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bool r : 1; //!< The permission to read
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bool w : 1; //!< The permission to write
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bool x : 1; //!< The permission to execute
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};
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u8 raw;
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};
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static_assert(sizeof(Permission) == sizeof(u8));
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/**
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* @url https://switchbrew.org/wiki/SVC#MemoryAttribute
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@ -419,7 +419,7 @@ namespace skyline::kernel::svc {
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return;
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}
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auto permission{*reinterpret_cast<memory::Permission *>(&state.ctx->gpr.w3)};
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memory::Permission permission(state.ctx->gpr.w3);
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if ((permission.w && !permission.r) || (permission.x && !permission.r)) {
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state.logger->Warn("svcMapSharedMemory: 'permission' invalid: {}{}{}", permission.r ? 'R' : '-', permission.w ? 'W' : '-', permission.x ? 'X' : '-');
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state.ctx->gpr.w0 = result::InvalidNewMemoryPermission;
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@ -452,7 +452,7 @@ namespace skyline::kernel::svc {
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return;
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}
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auto permission{*reinterpret_cast<memory::Permission *>(&state.ctx->gpr.w3)};
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memory::Permission permission(state.ctx->gpr.w3);
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if ((permission.w && !permission.r) || (permission.x && !permission.r)) {
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state.logger->Warn("svcCreateTransferMemory: 'permission' invalid: {}{}{}", permission.r ? 'R' : '-', permission.w ? 'W' : '-', permission.x ? 'X' : '-');
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state.ctx->gpr.w0 = result::InvalidNewMemoryPermission;
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@ -62,7 +62,7 @@ namespace skyline::kernel::type {
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"MOV LR, %x2\n\t" // Store entry in Link Register so it is jumped to on return
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"MOV X0, %x3\n\t" // Store the argument in X0
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"MOV X1, %x4\n\t" // Store the thread handle in X1, NCA applications require this
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"MOV X2, XZR\n\t"
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"MOV X2, XZR\n\t" // Zero out other GP and SIMD registers, not doing this will break applications
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"MOV X3, XZR\n\t"
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"MOV X4, XZR\n\t"
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"MOV X5, XZR\n\t"
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@ -27,7 +27,7 @@ namespace skyline::loader {
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u8 *base{loadInfo.base};
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void *entry{loadInfo.entry};
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state.logger->Info("Loaded nso 'rtld' at 0x{:X} (.text @ 0x{:X})", base, entry);
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state.logger->Info("Loaded 'rtld.nso' at 0x{:X} (.text @ 0x{:X})", base, entry);
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for (const auto &nso : {"main", "subsdk0", "subsdk1", "subsdk2", "subsdk3", "subsdk4", "subsdk5", "subsdk6", "subsdk7", "sdk"}) {
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if (exeFs->FileExists(nso))
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@ -45,8 +45,9 @@ namespace skyline::nce {
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}
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}
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void NCE::SignalHandler(int signal, siginfo *info, ucontext *context, void **tls) {
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void NCE::SignalHandler(int signal, siginfo *info, ucontext *ctx, void **tls) {
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if (*tls) {
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auto &mctx{ctx->uc_mcontext};
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const auto &state{*reinterpret_cast<ThreadContext *>(*tls)->state};
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if (signal != SIGINT) {
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state.logger->Warn("Thread #{} has crashed due to signal: {}", state.thread->id, strsignal(signal));
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@ -55,15 +56,14 @@ namespace skyline::nce {
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std::string trace;
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std::string cpuContext;
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const auto &ctx{reinterpret_cast<ucontext *>(context)->uc_mcontext};
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constexpr u16 instructionCount{20}; // The amount of previous instructions to print
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auto offset{ctx.pc - (instructionCount * sizeof(u32)) + (2 * sizeof(u32))};
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auto offset{mctx.pc - (instructionCount * sizeof(u32)) + (2 * sizeof(u32))};
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span instructions(reinterpret_cast<u32 *>(offset), instructionCount);
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if (mprotect(util::AlignDown(instructions.data(), PAGE_SIZE), util::AlignUp(instructions.size_bytes(), PAGE_SIZE), PROT_READ | PROT_WRITE | PROT_EXEC) == 0) {
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for (auto &instruction : instructions) {
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instruction = __builtin_bswap32(instruction);
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if (offset == ctx.pc)
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if (offset == mctx.pc)
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trace += fmt::format("\n-> 0x{:X} : 0x{:08X}", offset, instruction);
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else
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trace += fmt::format("\n 0x{:X} : 0x{:08X}", offset, instruction);
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@ -75,28 +75,28 @@ namespace skyline::nce {
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state.logger->Debug("Process Trace:{}", trace);
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state.logger->Debug("Raw Instructions: 0x{}", raw);
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} else {
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cpuContext += fmt::format("\nPC: 0x{:X} ('mprotect' failed with '{}')", ctx.pc, strerror(errno));
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cpuContext += fmt::format("\nPC: 0x{:X} ('mprotect' failed with '{}')", mctx.pc, strerror(errno));
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}
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if (ctx.fault_address)
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cpuContext += fmt::format("\nFault Address: 0x{:X}", ctx.fault_address);
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if (mctx.fault_address)
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cpuContext += fmt::format("\nFault Address: 0x{:X}", mctx.fault_address);
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if (ctx.sp)
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cpuContext += fmt::format("\nStack Pointer: 0x{:X}", ctx.sp);
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if (mctx.sp)
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cpuContext += fmt::format("\nStack Pointer: 0x{:X}", mctx.sp);
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for (u8 index{}; index < ((sizeof(mcontext_t::regs) / sizeof(u64)) - 2); index += 2)
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cpuContext += fmt::format("\n{}X{}: 0x{:<16X} {}{}: 0x{:X}", index < 10 ? ' ' : '\0', index, ctx.regs[index], index < 10 ? 'X' : '\0', index + 1, ctx.regs[index]);
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cpuContext += fmt::format("\n{}X{}: 0x{:<16X} {}{}: 0x{:X}", index < 10 ? ' ' : '\0', index, mctx.regs[index], index < 10 ? 'X' : '\0', index + 1, mctx.regs[index]);
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state.logger->Debug("CPU Context:{}", cpuContext);
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}
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context->uc_mcontext.pc = reinterpret_cast<skyline::u64>(&std::longjmp);
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context->uc_mcontext.regs[0] = reinterpret_cast<u64>(state.thread->originalCtx);
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context->uc_mcontext.regs[1] = true;
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mctx.pc = reinterpret_cast<skyline::u64>(&std::longjmp);
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mctx.regs[0] = reinterpret_cast<u64>(state.thread->originalCtx);
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mctx.regs[1] = true;
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*tls = nullptr;
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} else {
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signal::ExceptionalSignalHandler(signal, info, context); //!< Delegate throwing a host exception to the exceptional signal handler
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signal::ExceptionalSignalHandler(signal, info, ctx); //!< Delegate throwing a host exception to the exceptional signal handler
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}
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}
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@ -131,16 +131,16 @@ namespace skyline::nce {
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auto start{reinterpret_cast<const u32 *>(text.data())}, end{reinterpret_cast<const u32 *>(text.data() + text.size())};
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for (const u32 *instruction{start}; instruction < end; instruction++) {
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auto svc{*reinterpret_cast<const instr::Svc *>(instruction)};
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auto mrs{*reinterpret_cast<const instr::Mrs *>(instruction)};
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auto msr{*reinterpret_cast<const instr::Msr *>(instruction)};
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auto svc{*reinterpret_cast<const instructions::Svc *>(instruction)};
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auto mrs{*reinterpret_cast<const instructions::Mrs *>(instruction)};
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auto msr{*reinterpret_cast<const instructions::Msr *>(instruction)};
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if (svc.Verify()) {
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size += 7;
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offsets.push_back(instruction - start);
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} else if (mrs.Verify()) {
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if (mrs.srcReg == TpidrroEl0 || mrs.srcReg == TpidrEl0) {
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size += ((mrs.destReg != regs::X0) ? 6 : 3);
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size += ((mrs.destReg != registers::X0) ? 6 : 3);
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offsets.push_back(instruction - start);
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} else {
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if (rescaleClock) {
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@ -189,7 +189,7 @@ namespace skyline::nce {
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*patch++ = 0xA9BF0BE1; // STP X1, X2, [SP, #-16]!
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/* Jump to SvcHandler */
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for (const auto &mov : instr::MoveRegister(regs::X2, reinterpret_cast<u64>(&NCE::SvcHandler)))
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for (const auto &mov : instructions::MoveRegister(registers::X2, reinterpret_cast<u64>(&NCE::SvcHandler)))
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if (mov)
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*patch++ = mov;
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*patch++ = 0xD63F0040; // BLR X2
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@ -213,39 +213,39 @@ namespace skyline::nce {
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for (auto offset : offsets) {
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u32 *instruction{reinterpret_cast<u32 *>(text.data()) + offset};
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auto svc{*reinterpret_cast<instr::Svc *>(instruction)};
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auto mrs{*reinterpret_cast<instr::Mrs *>(instruction)};
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auto msr{*reinterpret_cast<instr::Msr *>(instruction)};
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auto svc{*reinterpret_cast<instructions::Svc *>(instruction)};
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auto mrs{*reinterpret_cast<instructions::Mrs *>(instruction)};
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auto msr{*reinterpret_cast<instructions::Msr *>(instruction)};
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if (svc.Verify()) {
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/* Per-SVC Trampoline */
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/* Rewrite SVC with B to trampoline */
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*instruction = instr::B((end - patch) + offset, true).raw;
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*instruction = instructions::B((end - patch) + offset, true).raw;
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/* Save Context */
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*patch++ = 0xF81F0FFE; // STR LR, [SP, #-16]!
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*patch = instr::BL(start - patch).raw;
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*patch = instructions::BL(start - patch).raw;
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patch++;
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/* Jump to main SVC trampoline */
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*patch++ = instr::Movz(regs::W0, static_cast<u16>(svc.value)).raw;
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*patch = instr::BL((start - patch) + guest::SaveCtxSize).raw;
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*patch++ = instructions::Movz(registers::W0, static_cast<u16>(svc.value)).raw;
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*patch = instructions::BL((start - patch) + guest::SaveCtxSize).raw;
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patch++;
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/* Restore Context and Return */
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*patch = instr::BL((start - patch) + guest::SaveCtxSize + MainSvcTrampolineSize).raw;
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*patch = instructions::BL((start - patch) + guest::SaveCtxSize + MainSvcTrampolineSize).raw;
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patch++;
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*patch++ = 0xF84107FE; // LDR LR, [SP], #16
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*patch = instr::B((end - patch) + offset + 1).raw;
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*patch = instructions::B((end - patch) + offset + 1).raw;
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patch++;
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} else if (mrs.Verify()) {
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if (mrs.srcReg == TpidrroEl0 || mrs.srcReg == TpidrEl0) {
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/* Emulated TLS Register Load */
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/* Rewrite MRS with B to trampoline */
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*instruction = instr::B((end - patch) + offset, true).raw;
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*instruction = instructions::B((end - patch) + offset, true).raw;
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/* Allocate Scratch Register */
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if (mrs.destReg != regs::X0)
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if (mrs.destReg != registers::X0)
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*patch++ = 0xF81F0FE0; // STR X0, [SP, #-16]!
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/* Retrieve emulated TLS register from ThreadContext */
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@ -256,66 +256,66 @@ namespace skyline::nce {
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*patch++ = 0xF9415C00; // LDR X0, [X0, #0x2B8] (ThreadContext::tpidrEl0)
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/* Restore Scratch Register and Return */
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if (mrs.destReg != regs::X0) {
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*patch++ = instr::Mov(regs::X(mrs.destReg), regs::X0).raw;
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if (mrs.destReg != registers::X0) {
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*patch++ = instructions::Mov(registers::X(mrs.destReg), registers::X0).raw;
|
||||
*patch++ = 0xF84107E0; // LDR X0, [SP], #16
|
||||
}
|
||||
*patch = instr::B((end - patch) + offset + 1).raw;
|
||||
*patch = instructions::B((end - patch) + offset + 1).raw;
|
||||
patch++;
|
||||
} else {
|
||||
if (rescaleClock) {
|
||||
if (mrs.srcReg == CntpctEl0) {
|
||||
/* Physical Counter Load Emulation (With Rescaling) */
|
||||
/* Rewrite MRS with B to trampoline */
|
||||
*instruction = instr::B((end - patch) + offset, true).raw;
|
||||
*instruction = instructions::B((end - patch) + offset, true).raw;
|
||||
|
||||
/* Rescale host clock */
|
||||
std::memcpy(patch, reinterpret_cast<void *>(&guest::RescaleClock), guest::RescaleClockSize * sizeof(u32));
|
||||
patch += guest::RescaleClockSize;
|
||||
|
||||
/* Load result from stack into destination register */
|
||||
instr::Ldr ldr(0xF94003E0); // LDR XOUT, [SP]
|
||||
instructions::Ldr ldr(0xF94003E0); // LDR XOUT, [SP]
|
||||
ldr.destReg = mrs.destReg;
|
||||
*patch++ = ldr.raw;
|
||||
|
||||
/* Free 32B stack allocation by RescaleClock and Return */
|
||||
*patch++ = {0x910083FF}; // ADD SP, SP, #32
|
||||
*patch = instr::B((end - patch) + offset + 1).raw;
|
||||
*patch = instructions::B((end - patch) + offset + 1).raw;
|
||||
patch++;
|
||||
} else if (mrs.srcReg == CntfrqEl0) {
|
||||
/* Physical Counter Frequency Load Emulation */
|
||||
/* Rewrite MRS with B to trampoline */
|
||||
*instruction = instr::B((end - patch) + offset, true).raw;
|
||||
*instruction = instructions::B((end - patch) + offset, true).raw;
|
||||
|
||||
/* Write back Tegra X1 Counter Frequency and Return */
|
||||
for (const auto &mov : instr::MoveRegister(regs::X(mrs.destReg), TegraX1Freq))
|
||||
for (const auto &mov : instructions::MoveRegister(registers::X(mrs.destReg), TegraX1Freq))
|
||||
*patch++ = mov;
|
||||
*patch = instr::B((end - patch) + offset + 1).raw;
|
||||
*patch = instructions::B((end - patch) + offset + 1).raw;
|
||||
patch++;
|
||||
}
|
||||
} else if (mrs.srcReg == CntpctEl0) {
|
||||
/* Physical Counter Load Emulation (Without Rescaling) */
|
||||
// We just convert CNTPCT_EL0 -> CNTVCT_EL0 as Linux doesn't allow access to the physical counter
|
||||
*instruction = instr::Mrs(CntvctEl0, regs::X(mrs.destReg)).raw;
|
||||
*instruction = instructions::Mrs(CntvctEl0, registers::X(mrs.destReg)).raw;
|
||||
}
|
||||
}
|
||||
} else if (msr.Verify() && msr.destReg == TpidrEl0) {
|
||||
/* Emulated TLS Register Store */
|
||||
/* Rewrite MSR with B to trampoline */
|
||||
*instruction = instr::B((end - patch) + offset, true).raw;
|
||||
*instruction = instructions::B((end - patch) + offset, true).raw;
|
||||
|
||||
/* Allocate Scratch Registers */
|
||||
bool x0x1{mrs.srcReg != regs::X0 && mrs.srcReg != regs::X1};
|
||||
bool x0x1{mrs.srcReg != registers::X0 && mrs.srcReg != registers::X1};
|
||||
*patch++ = x0x1 ? 0xA9BF07E0 : 0xA9BF0FE2; // STP X(0/2), X(1/3), [SP, #-16]!
|
||||
|
||||
/* Store new TLS value into ThreadContext */
|
||||
*patch++ = x0x1 ? 0xD53BD040 : 0xD53BD042; // MRS X(0/2), TPIDR_EL0
|
||||
*patch++ = instr::Mov(x0x1 ? regs::X1 : regs::X3, regs::X(msr.srcReg)).raw;
|
||||
*patch++ = instructions::Mov(x0x1 ? registers::X1 : registers::X3, registers::X(msr.srcReg)).raw;
|
||||
*patch++ = x0x1 ? 0xF9015C01 : 0xF9015C03; // STR X(1/3), [X0, #0x4B8] (ThreadContext::tpidrEl0)
|
||||
|
||||
/* Restore Scratch Registers and Return */
|
||||
*patch++ = x0x1 ? 0xA8C107E0 : 0xA8C10FE2; // LDP X(0/2), X(1/3), [SP], #16
|
||||
*patch = instr::B((end - patch) + offset + 1).raw;
|
||||
*patch = instructions::B((end - patch) + offset + 1).raw;
|
||||
patch++;
|
||||
}
|
||||
}
|
||||
|
@ -17,7 +17,7 @@ namespace skyline::nce {
|
||||
static void SvcHandler(u16 svc, ThreadContext *ctx);
|
||||
|
||||
public:
|
||||
static void SignalHandler(int signal, siginfo *info, ucontext *context, void **tls);
|
||||
static void SignalHandler(int signal, siginfo *info, ucontext *ctx, void **tls);
|
||||
|
||||
NCE(const DeviceState &state);
|
||||
|
||||
|
@ -4,12 +4,15 @@
|
||||
#include <common.h>
|
||||
|
||||
namespace skyline::nce {
|
||||
namespace regs {
|
||||
enum X { X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30 };
|
||||
enum W { W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, W16, W17, W18, W19, W20, W21, W22, W23, W24, W25, W26, W27, W28, W29, W30 };
|
||||
/**
|
||||
* @note We use unscoped enumerations to leak all register enumerations into the registers namespace
|
||||
*/
|
||||
namespace registers {
|
||||
enum X : u8 { X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30 };
|
||||
enum W : u8 { W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, W16, W17, W18, W19, W20, W21, W22, W23, W24, W25, W26, W27, W28, W29, W30 };
|
||||
}
|
||||
|
||||
namespace instr {
|
||||
namespace instructions {
|
||||
/**
|
||||
* @url https://developer.arm.com/docs/ddi0596/latest/base-instructions-alphabetic-order/brk-breakpoint-instruction
|
||||
*/
|
||||
@ -66,7 +69,7 @@ namespace skyline::nce {
|
||||
* @param srcReg The source system register
|
||||
* @param dstReg The destination Xn register
|
||||
*/
|
||||
constexpr Mrs(u32 srcReg, regs::X dstReg) {
|
||||
constexpr Mrs(u32 srcReg, registers::X dstReg) {
|
||||
this->srcReg = srcReg;
|
||||
this->destReg = dstReg;
|
||||
sig = 0xD53;
|
||||
@ -184,7 +187,7 @@ namespace skyline::nce {
|
||||
* @param imm16 The 16-bit value to store
|
||||
* @param shift The offset (in units of 16-bits) in the register to store the value at
|
||||
*/
|
||||
constexpr Movz(regs::X destReg, u16 imm16, u8 shift = 0) {
|
||||
constexpr Movz(registers::X destReg, u16 imm16, u8 shift = 0) {
|
||||
this->destReg = static_cast<u8>(destReg);
|
||||
this->imm16 = imm16;
|
||||
hw = shift;
|
||||
@ -197,7 +200,7 @@ namespace skyline::nce {
|
||||
* @param imm16 The 16-bit value to store
|
||||
* @param shift The offset (in units of 16-bits) in the register to store the value at
|
||||
*/
|
||||
constexpr Movz(regs::W destReg, u16 imm16, u8 shift = 0) {
|
||||
constexpr Movz(registers::W destReg, u16 imm16, u8 shift = 0) {
|
||||
this->destReg = static_cast<u8>(destReg);
|
||||
this->imm16 = imm16;
|
||||
hw = shift;
|
||||
@ -239,7 +242,7 @@ namespace skyline::nce {
|
||||
* @param imm16 The 16-bit value to store
|
||||
* @param shift The offset (in units of 16-bits) in the register to store the value at
|
||||
*/
|
||||
constexpr Movk(regs::X destReg, u16 imm16, u8 shift = 0) {
|
||||
constexpr Movk(registers::X destReg, u16 imm16, u8 shift = 0) {
|
||||
this->destReg = static_cast<u8>(destReg);
|
||||
this->imm16 = imm16;
|
||||
hw = shift;
|
||||
@ -252,7 +255,7 @@ namespace skyline::nce {
|
||||
* @param imm16 The 16-bit value to store
|
||||
* @param shift The offset (in units of 16-bits) in the register to store the value at
|
||||
*/
|
||||
constexpr Movk(regs::W destReg, u16 imm16, u8 shift = 0) {
|
||||
constexpr Movk(registers::W destReg, u16 imm16, u8 shift = 0) {
|
||||
this->destReg = static_cast<u8>(destReg);
|
||||
this->imm16 = imm16;
|
||||
hw = shift;
|
||||
@ -291,7 +294,7 @@ namespace skyline::nce {
|
||||
* @note 0 is returned for any instruction that isn't required
|
||||
*/
|
||||
template<typename Type>
|
||||
constexpr std::array<u32, sizeof(Type) / sizeof(u16)> MoveRegister(regs::X destination, Type value) {
|
||||
constexpr std::array<u32, sizeof(Type) / sizeof(u16)> MoveRegister(registers::X destination, Type value) {
|
||||
std::array<u32, sizeof(Type) / sizeof(u16)> instructions;
|
||||
|
||||
auto valuePointer{reinterpret_cast<u16 *>(&value)};
|
||||
@ -302,9 +305,9 @@ namespace skyline::nce {
|
||||
auto offsetValue{*(valuePointer + offset)};
|
||||
if (offsetValue) {
|
||||
if (zeroed) {
|
||||
instruction = instr::Movk(destination, offsetValue, offset).raw;
|
||||
instruction = instructions::Movk(destination, offsetValue, offset).raw;
|
||||
} else {
|
||||
instruction = instr::Movz(destination, offsetValue, offset).raw;
|
||||
instruction = instructions::Movz(destination, offsetValue, offset).raw;
|
||||
zeroed = true;
|
||||
}
|
||||
} else {
|
||||
@ -326,7 +329,7 @@ namespace skyline::nce {
|
||||
* @param destReg The destination Xn register to store the value in
|
||||
* @param srcReg The source Xn register to retrieve the value from
|
||||
*/
|
||||
constexpr Mov(regs::X destReg, regs::X srcReg) {
|
||||
constexpr Mov(registers::X destReg, registers::X srcReg) {
|
||||
this->destReg = static_cast<u8>(destReg);
|
||||
sig0 = 0x1F;
|
||||
imm = 0;
|
||||
@ -340,7 +343,7 @@ namespace skyline::nce {
|
||||
* @param destReg The destination Wn register to store the value in
|
||||
* @param srcReg The source Wn register to retrieve the value from
|
||||
*/
|
||||
constexpr Mov(regs::W destReg, regs::W srcReg) {
|
||||
constexpr Mov(registers::W destReg, registers::W srcReg) {
|
||||
this->destReg = static_cast<u8>(destReg);
|
||||
sig0 = 0x1F;
|
||||
imm = 0;
|
||||
|
@ -18,16 +18,20 @@ namespace skyline::kernel {
|
||||
auto romFile{std::make_shared<vfs::OsBacking>(romFd)};
|
||||
auto keyStore{std::make_shared<crypto::KeyStore>(appFilesPath)};
|
||||
|
||||
if (romType == loader::RomFormat::NRO)
|
||||
state.loader = std::make_shared<loader::NroLoader>(romFile);
|
||||
else if (romType == loader::RomFormat::NSO)
|
||||
state.loader = std::make_shared<loader::NsoLoader>(romFile);
|
||||
else if (romType == loader::RomFormat::NCA)
|
||||
state.loader = std::make_shared<loader::NcaLoader>(romFile, keyStore);
|
||||
else if (romType == loader::RomFormat::NSP)
|
||||
state.loader = std::make_shared<loader::NspLoader>(romFile, keyStore);
|
||||
else
|
||||
throw exception("Unsupported ROM extension.");
|
||||
state.loader = [=]() -> std::shared_ptr<loader::Loader> {
|
||||
switch (romType) {
|
||||
case loader::RomFormat::NRO:
|
||||
return std::make_shared<loader::NroLoader>(romFile);
|
||||
case loader::RomFormat::NSO:
|
||||
return std::make_shared<loader::NsoLoader>(romFile);
|
||||
case loader::RomFormat::NCA:
|
||||
return std::make_shared<loader::NcaLoader>(romFile, keyStore);
|
||||
case loader::RomFormat::NSP:
|
||||
return std::make_shared<loader::NspLoader>(romFile, keyStore);
|
||||
default:
|
||||
throw exception("Unsupported ROM extension.");
|
||||
}
|
||||
}();
|
||||
|
||||
auto &process{state.process};
|
||||
process = std::make_shared<kernel::type::KProcess>(state);
|
||||
|
@ -47,7 +47,7 @@ namespace skyline::vfs {
|
||||
/**
|
||||
* @brief Implicit casting for reading into spans of different types
|
||||
*/
|
||||
template<class T, typename std::enable_if<!std::is_same_v<T, u8>, bool>::type = true>
|
||||
template<typename T, typename std::enable_if<!std::is_same_v<T, u8>, bool>::type = true>
|
||||
inline size_t Read(span <T> output, size_t offset = 0) {
|
||||
return Read(output.template cast<u8>(), offset);
|
||||
}
|
||||
|
@ -18,7 +18,7 @@ namespace skyline {
|
||||
u32 offset;
|
||||
u32 size;
|
||||
|
||||
template<class T>
|
||||
template<typename T>
|
||||
inline T Read(const std::shared_ptr<vfs::Backing> &backing, size_t baseOffset = 0) {
|
||||
if (sizeof(T) > size)
|
||||
throw exception("Section size ({}) smaller than Read type size ({})", size, sizeof(T));
|
||||
|
Loading…
Reference in New Issue
Block a user